I'm getting confused by the Axx notation differences between the m68k (starts at A1) and the chip (starts at A0).

Just a mo... The EPROM is only 256Kx16, so how do you fit two (potentially 256K) TOS images in there?!

Or I can use a second GAL, but that's slower.

I've just noticed a mistake. The second AND gate will not work and can be left out. Though really the /OE activation on the EEPROM should require /AS to be asserted as otherwise it could be reacting to a spurious address on the bus.

OK, I'll have to use a NOR gate in an 74LS02.

Does this logic for the ROM decode look OK? The GAL will match the address patterns for both possible ROM address ranges. I've used /AS for the ROM /CE as according to the spec. /CE should be enabled before /OE and given the logic delays this should work due to the logic delays in the GAL and 74LS08...

Thanks.

@exxos What model eeprom do you use for your dualtos?

OK, not strictly the project, but I decided that my dev machine needed a bit of a sprucing up, so I gave the case a good clean and then a quick, light spray job. IMG_2032.jpg Before IMG_2034.jpg During IMG_2035.jpg After OK, now the keyboard looks awful, but the retr-brightening of that will have to...

I know, I know... But the socket was a passive component... how could that possibly hurt?

I rather think, there was a short under the socket... was it original "funky" socket, a modified modern one, or a modern one on the adapter board? No, I put a foam pad underneath (approximately 2mm thick) to make sure that there was no possibility that the underside of the conversion board would ge...