@PaulJ : I stand corrected (I'm always happy to be wrong, it means I'm learning ).

Glad to see other programmer being able to JTAG these devices.

The chipmax2 doesn't .. it does the ATF16/20/22Vxx, ATV750/1500/2500 .. but not the ATF15xx which have their proprietary algo. They require a specific programmer , the ATDH1150USB (which as you can imagine only does these and nothing else). The ATF15xx family : http://ww1.microchip.com/downloads/en/...

Do not mistake register number to data bit on the bus
Register 0 to 7 are 16 bit register, and so are register 8 to 15 and they are accessed as 16 bit registers even if only the lower 8 bit contain actual data for some register.
So CS0 and CS1 select the register bank, not the bus width.

AS on the CPU will go to Z, but not your ST_AS as it's an output of the CPLD unless you tell it to set it to Z ... by using ST_AS.OE SEC CPU AS -> CPLD -> ST_AS CPU_AS = Z -> CPLD -> ST_AS is either 0 or 1 depending on internal pull-up config and how the CPLD behave when a signal is driven by an inp...

The blitter access the ROM.

That is really weird.
May be I should make a proper one.

On the 68020 card we do have to deal with this and we need to take the BR/BG/BGACK from the ST as well as the ST_AS and CPU_AS to make sure we let the system know when the bus is used by the CPU (68020) and thus assert ST_AS to prevent the glue/GSTMCU from trying to take the bus as there is a bus cy...

If you copied it from another lib in Eagle, make sure you took the TQFP64-10x10 one.

That is really weird. I've used the Eagle TQFP100 and that one was fine. Same with the TQFP44 package. TQFP64 has a pitch of 0.5mm center to center of pins. Pin width should be about 0.20 mm proper dimension can be found in this doc : http://pdf.datasheetcatalog.com/datasheets/134/306806_DS.pdf Make...