Search found 90 matches

by ijor
Thu Jan 31, 2019 11:40 pm
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

ah right, I need to look into that... So what exactly happens then, literally DTACK on SND_CS stays low for a long time ? how long ? Assuming when /AS is high DTACK is still low for longer than "normal" ? DTACK on sound chip access is delayed for two cycles. But since the delay works on the raising...
by ijor
Thu Jan 31, 2019 8:58 pm
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Now I am confused, why do I need to stop GLUE seeing /AS on sound chip access ? If I did that, GLUE wouldn't decode SND_CS and the sound chip would never be enabled ? I meant that somehow you must avoid the issue of DTACK being kept low for too long. This definitely happens when accessing the sound...
by ijor
Thu Jan 31, 2019 8:40 pm
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

I have never seen that behaviour on any of my machines.. DTACK would stay low for another full CLK8 cycle on ROM access. As to why you see something different , I really can't explain... Yours is more like how things should be yes, but we never saw that. ... Its because of this we isolated /AS to G...
by ijor
Thu Jan 31, 2019 8:10 pm
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

You misunderstood (or may be I didn't explain it correctly). The problem on a sound chip access is not DTACK assertion, but DTACK DE assertion. The same logic in GLUE that delays DTACK assertion when accessing the sound chip, it delays DTACK deassertion as well. So in this case, when a very fast CP...
by ijor
Thu Jan 31, 2019 5:43 pm
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

That doesn't actually happen though with ROM access. I documented it a long time ago, I think TF even noticed the same.. That Based on normal 8MHz timings, GLUE DTACK stays low right up until S2 of the next bus cycle. There is about 20-40ns difference between DTACK going high and /AS going low in t...
by ijor
Thu Jan 31, 2019 2:10 pm
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Though one problem with the GLUE, is it keeps DTACK low right up unitl S2 of the next bus cycle when it decodes ROM. Do you know if it does that for other things it decodes ? That is the reason I stop GLUE seeing /AS for ROM cycles as its DTACK take forever to release. Though maybe GLUE is doing th...
by ijor
Thu Jan 31, 2019 1:30 am
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

BERR I am still suspect.. Ijor thinks its not possible for error for BERR in my setup... Though Things to seem to point in that direction.. I didn't say, or at least I didn't mean, that problems with BERR are not possible at all. I say that slow BERR deassertion should not cause the CPU to get BERR...
by ijor
Mon Jan 28, 2019 4:30 pm
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

I am/was also assuming BERR stays active for a enture CLK8 cycle before deaserted and the CPU running faster is re-reading BERR causing the issue. No. As said, BERR is deasserted asynchronously with AS. But the output is open drain, so the raising edge is slow. But again, the CPU will wait for BERR...
by ijor
Mon Jan 28, 2019 2:03 pm
Forum: ST 16MHz V2.X SERIES BOOSTERS
Topic: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)
Replies: 448
Views: 56286

Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

I think when CPU runs 50MHz, it sees BERR, completes bus cycle, but then GLUE still has BERR active, so CPU "sees" BERR again and repeats the cycle which is now invalid. I'm not sure something like this could happen without something else intervening. BERR is deasserted asynchronously by GLUE as so...
by ijor
Tue Jan 08, 2019 1:55 pm
Forum: FLOPPY DRIVES KITS & UPGRADES
Topic: Datel RF302R
Replies: 22
Views: 2733

Re: Datel RF302R

The enclosure I have (Datel RF302R) only works with a drive set to DS0, I have tested it with a 1040STF, and it works fine in this configuration, with copying between A: and B:, formatting etc all working fine. Switching the external drive to be DS1 does not work, which is why I believe cable selec...

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