So I got this out of storage, it's been sat for almost 20 years. I have no monitor for it (VGA) no keyboard or mouse. I did hide :D and power it up, no bangs no smoke. I doubt I will ever get around to completing it, I'd hate to see it go but I'm being realistic.what should I do? 4MB 72 pin (70ns?) ...

Top tip for routing RAM, you can pin swap data bits and some address bits depending on the type of ram used. Probably best just to stick to the data bits though to be on the safe side.

ICs best routed direct to power and ground plane with as short as possible tracks, ideally via right next to pad. Then place caps in small package as possible, again with vias to decouple the plane. Place vias to side of caps for smallest inductance loop, imagine viewing the board if it was sliced ...

ICs best routed direct to power and ground plane with as short as possible tracks, ideally via right next to pad. Then place caps in small package as possible, again with vias to decouple the plane. Place vias to side of caps for smallest inductance loop, imagine viewing the board if it was sliced a...

Perhaps my old post wasn't clear, but with all suska cores you choose if you want your buffers internal or drive external ones. There are two top files in the hierarchy. You dont need to modify anything apart from your pin constraints file to put signals on your pin of choice. So are you saying the...

I've used an IDT part in the past, for floppy etc but can't remember which one.it was bidirectional. However the TI parts have very good documentation, so might be better choice. Most seem to be based on the MOSFET idea, which I've also used in discrete form for I2c etc. Perhaps my old post wasn't c...

If we did not have to worry about tri-state, then pretty much any general logic level translator chip would work. In case of the blitter, it needs to be tri-stated and it does not have control logic in the core to take care of that The suska code does if that's what you mean? My post from 14th sept...

The 5v you see on the pin is probably just leakage current and the tiny ESD diodes inside the FPGA will just clamp that, it'll be microamps.

Is it an anti alias filter or something? Perhaps the clock driving it needs to be series terminated? Or maybe its just a noisy chip?

I used a falcon video DAC when I did my ST, as it was what i had kicking about. It worked off 32MHz in all resolutions. I just used the MSBs and tied lower bits to ground like any DAC or ADC. I do remember it getting pretty hot though, it was mounted with kynar wire to stripboard so no real thermal ...