

Its about 95% routed now. The main issue really is the control lines from GLUE to every other chip because loads of signals need to route right across the board, which isn't simple as I already have multiple crossing signals on 3 layers already, so there's no room left . In hindsight the GLUE might have been better going near the ACIA's . Though it begs the question is my very first original route ( viewtopic.php?f=77&t=14#p41) where the chips were at the bottom of the board with a common bus, might actually be better *if* it could be squashed down a lot more.