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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Fri Oct 06, 2017 12:57 pm
by troed
exxos wrote: Fri Oct 06, 2017 12:45 pm Add a 1K resistor (pull up) on CPU /DTACK and /AS see if that helps. Also add a sil array on the DMA databus.
Thanks for the suggestions :)

(Also, I just placed an order for a scope ... will arrive in ~three weeks)

/Troed

Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Fri Oct 06, 2017 1:14 pm
by exxos
troed wrote: Fri Oct 06, 2017 12:57 pm
Thanks for the suggestions :)
(Also, I just placed an order for a scope ... will arrive in ~three weeks)
cool :)

There is a few ways to go about fixing such issues. Though its guesswork to what the problem actually is. The only problem I really had was 16pixel offset issues.

Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Fri Oct 06, 2017 5:15 pm
by exxos
I would suggest you get a 74F161 as well. Then you can feed the 32mhz into the MMU and the F161, then you will get better 16mhz,8mhz,4mhz,2mhz outputs and drive the CPU, MMU, MFP with the clocks output by the F161.

This way all the clocks will be in proper sync at least. Its possible the CPU is reading DTACK to early you you may need to re-sync some signals to the CPU.

Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Fri Oct 06, 2017 6:27 pm
by troed
exxos wrote: Fri Oct 06, 2017 5:15 pm I would suggest you get a 74F161 as well.
Now ordered.

:)

Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Sat Oct 07, 2017 12:38 pm
by troed
A bit of shooting in the dark at the moment, but:

33R added to 8MHz (for GLUE, WD etc) - no change
10k pullup added to DMA databus - no change

I can very repeatedly and predictably keep pressing ESC to get more or less correct data read from the disk. Very seldomly (but it happens) the size or filenames are "corrupt". Either the files (some or all) are not found or they are. Loading a file never works, the floppy fails to seek to the correct track (or read the correct pulses).

I'll hook up the LA to the floppy controller and DMA next I think.

Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Sat Oct 07, 2017 4:17 pm
by exxos
I think your heading towards DTACK sync issues. Though I would start with the F161 and replace the clocks first.

You will have to isolate the DTACK pin from the CPU and run it though a flipflop gate, clock can be 8mhz. Though you may need to add a inverter on the clock input. Or you might be able to use 4mhz clock. Basically you need to slow down DTACK to the CPU.

Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Sun Oct 08, 2017 4:31 pm
by troed
Thanks, will look into dtack.

In the meantime, here are the clocks sampled at CPU, DMA and Floppy. I did a few runs with detection level at 1.0V up to 2.8V to try to figure out if maybe they were weak (still waiting for that scope).
la_cpu_dma_floppy.png
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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Sun Oct 08, 2017 5:48 pm
by exxos
They look fine there. Though you would have to sample a few seconds and look at every "page" to look for a glitch. I will try and post a example when I get home later of what I mean.

You could try this... basically similar to using another FF.. if you have a spare few inverter gates... run the MB DTACK line via sets of 2 inverter and run them to the CPU DTACK PIN. (lift DTACK pin out of socket)

Then DTACK will run though 2 NOT gates, basically just creating a delay of 2 gates worth. So about 10ns per gate, 2 gates 20ns total. Though try 2 gates, boot up see if things improve.. then try another 2 gates for 40ns delay.. then another 2 gates for 60ns delay.

EDIT..
This shows what the LA can sometimes show , as it does on ST_DTACK..
efbdecei.jpg
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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Wed Oct 11, 2017 5:08 pm
by troed
IMG_20171011_174935.jpg
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IMG_20171011_175823.jpg
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new_clocks.png
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The GB6 version is old, without the new algorithm, and I think it's comparing to a system with blitter which this machine doesn't have. Also slightly difficult to read ;)

Pure genius exxos to suggest the sync binary counter.

Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Posted: Wed Oct 11, 2017 5:57 pm
by troed
IMG_20171011_185241.jpg
IMG_20171011_185241.jpg (1022.9 KiB) Viewed 5739 times

Alright, so a closer inspection of the clock LA shows something that's indeed in the spec sheet for the sync counter - it syncs to the falling edge of the clock pulses. I would guess this might be the reason why there seems to be wait states forced for RAM access - it's at 100%. ROM speed is mostly fine though, and CPU of course is.

However, my main interest to begin with is in getting some sensible support for the new overclocked Shifter video modes so I'll probably let the boost rest for a while. I'm guessing some F04 inverters might sort that out.

The machine seems rock stable with the current config though.

/Troed