Boosting STFM: 16MHz bus, 64MHz Shifter

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troed
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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by troed » Fri Mar 09, 2018 8:58 pm

exxos wrote:
Fri Mar 09, 2018 7:12 pm
Interesting!

At some point I was running the shifter on its own 5V regulator (driven from the 12V line).. The shifter doesn't exactly get stable voltage, even if you add 4,700uF across it!

So it may be worth trying a 5V regulator on the shifter ( break its 5V feed of course) and see if its really voltage related or noise related.
I'll put it on my todo :) Next up I think will be to socket the Shifter so I can figure out how IC specific this is or if it's general.

Also, I started thinking ... since we control the rate the MMU latches words (we can AND DE with more things than just 2MHz) ... maybe it's possible to run the Shifter on non-multiples of 32MHz.

Let's say we let the MMU latch 2/3 of the time. The Shifter would then need to be clocked at 48Mhz, and the resolution (in mono) would be 960x400.

There might be things I haven't thought through yet here, but maybe. If so, it would mean another oscillator ... and I would need to move to a 22V10 to test ...

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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by exxos » Fri Mar 09, 2018 9:14 pm

troed wrote:
Fri Mar 09, 2018 8:58 pm
I'll put it on my todo :) Next up I think will be to socket the Shifter so I can figure out how IC specific this is or if it's general.
:thumbup:
troed wrote:
Fri Mar 09, 2018 8:58 pm
Also, I started thinking ... since we control the rate the MMU latches words (we can AND DE with more things than just 2MHz) ... maybe it's possible to run the Shifter on non-multiples of 32MHz.
I did half wonder about that, its one reason I thought if you could try a faster clock then we can see what the MMU *really* maxes out at.

I *think* many many years ago, I tried running the MMU on its own 16mhz clock.. I think the machine was unstable.. but this was like 20 years ago :)

In anycase, easy test, just mash in a 32mhz clock into the MMU from a external osc and see what breaks :twisted:

I did wonder about the MMU counters for the video.. If the MMU is running faster then the video counter will be out of sync with the shifter ? I can't remember how DE fits into it all.. but we DE isn't used we get basically full screen, so the MMU counters have to be done from its master clock..

We really need a new FPGA MMU.. we could do such awesome things.. :roll:
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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by troed » Sat Mar 10, 2018 7:48 am

(So yesterday before dozing off to sleep I seem to have ordered some 48MHz oscillators and GAL22V10 ... ;))

I do believe a DE duty cycle of XXXX..XXXX..XXXX..XXXX..XXXX for a 32MHz MMU and Shifter clocked at 48MHz would work.

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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by troed » Sat Mar 10, 2018 8:11 pm

So this RESET thing ... I've been working on it on and off throughout the day, but the results confuse me.

If I measure RESET on the CPU with the LA, it's pretty much what I expect. I'm surprised at how it bounces high and low, but at least it stays high when the computer runs.

If I now connect the same RESET pin from the CPU to an input on my GAL, the computer does not run. RESET seems to be forced low by the GAL. Which makes no sense. If anything the GAL has weak pullups on on its pins (if I don't connect the wire then I get an internal signal HIGH) and a pin configured as input shouldn't drive anything ...

What am I missing? I'm still working on the assumption that a lot of my bootup issues have to do with the GAL clocking things pretty randomly and I'm trying to make it just start everything on some sane input.

edit: The GAL logic is of course tested by manually pulling the pin I connect RESET to high and low and works as intended ..

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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by exxos » Sat Mar 10, 2018 9:51 pm

Did you try a 1k pull up and a larger cap on reset ?
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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by troed » Sun Mar 18, 2018 9:41 pm

exxos wrote:
Sat Mar 10, 2018 9:51 pm
Did you try a 1k pull up and a larger cap on reset ?
So I got a bit sidetracked by a friend giving me a 520ST last weekend. That model was my original Atari and I just had to piggy-back upgrade its RAM :D

I've now added a 2.3 kOhm pullup to RESET, which means it's ~650 Ohm when measured in circuit. This seems to have greatly increased the chances of the computer to boot compared to before, so that's good. However, connecting RESET to the GAL _input_, for my synchronization code, still causes RESET to stay low (and not boot, of course). This is what I still don't understand how it can happen ...

It's possible I don't need synchronization code in the GAL at all, although I'm worried about the "wakeup" states which I think it would fix. Will add the cap as well another day.

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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by exxos » Sun Mar 18, 2018 9:53 pm

troed wrote:
Sun Mar 18, 2018 9:41 pm
I've now added a 2.3 kOhm pullup to RESET, which means it's ~650 Ohm when measured in circuit. This seems to have greatly increased the chances of the computer to boot compared to before, so that's good.
Whatever the cap value is in the reset circuit (looks like 2x 22uF caps on both sides of the 556) add another 47uF across them, or just swap for 47uF's or 100uF. Machine will take a couple seconds longer to init.. but also worth doing anyway..
troed wrote:
Sun Mar 18, 2018 9:41 pm
However, connecting RESET to the GAL _input_, for my synchronization code, still causes RESET to stay low (and not boot, of course). This is what I still don't understand how it can happen ...
Where is reset in your code ?
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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by troed » Sun Mar 18, 2018 10:02 pm

exxos wrote:
Sun Mar 18, 2018 9:53 pm
Where is reset in your code ?
I added a simple AND term with RESET on one of the inputs. Since it's an input-only pin, I don't see how it can drive anything low ... (Actually there's an internal pullup so if I don't connect the wire the GAL logic acts as if RESET was high).

Code: Select all

/* inputs */
PIN 1 = clk;
PIN 2 = RESET;
PIN 3 = DE;
PIN 4 = C64;
PIN 5 = C32;
PIN 6 = S1;
PIN 7 = S0;

...

/* We clock the GAL with twice the needed MMU clock */
/* 64, 64, 32 */
SC = (S0 & S1 & C64 & RESET) #
     (S0 & !S1 & C64 & RESET) #
     (!S0 & !S1 & C32 & RESET);
     
/* 64, 32, 32 */
/* MMUCLK instead of CLK32 since we want to be on a division of 64.000MHz and not 32.08 */
/* inverted MMUCLK to see if we get all on the falling edge */
SHFTCLK = (S0 & S1 & C64 & RESET) #
          (S0 & !S1 & !MMUCLK & RESET) #
          (!S0 & !S1 & C32 & RESET);
The idea is that none of the combinatorial outputs would go high as long as RESET is low, and the GAL won't clock itself (and thus MMU, CPU, GLUE and MFP won't be clocked either) as long as RESET is low ... I thought this should get me into a good known state once RESET goes high.

There must be something really simple I just haven't figured out how connecting pin 2 to CPU RESET causes it to stay low ..

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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by exxos » Sun Mar 18, 2018 10:09 pm

troed wrote:
Sun Mar 18, 2018 10:02 pm
There must be something really simple I just haven't figured out how connecting pin 2 to CPU RESET causes it to stay low ..

:shrug:

PIN2 is input only I think on the GAL.. so it can't drive any pins low... 1K and less pull up on reset is more than enough to pull the reset line high.. so can only assume you have a short somewhere on your board.. or you have another reset pin on the GAL output somewhere..

EDIT: Its also possible the GAL might simply have ran out of "gates"... WinCupl caught me out a few times on that.. it compiles without errors and your code screws up with no real reason why..

Maybe try a "pass through" setup with the gal, minimal setup for it to work.. use reset somewhere.. and see if you still have the same problem..
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Re: Boosting STFM: 16MHz bus, 64MHz Shifter

Post by pakman » Mon Mar 19, 2018 10:28 pm

troed wrote:
Sun Mar 18, 2018 10:02 pm
There must be something really simple I just haven't figured out how connecting pin 2 to CPU RESET causes it to stay low ..
Keep in mind that the RESET line at the the CPU is not only an input, but (sometimes) an output as well!

So what happens is:
- At power on the reset circuit will release the RESET line
- The CPU starts executing the TOS
- One of the first commands to be executed is "RESET"
- Then the CPU will activate the RESET line in order to reset all circuits connected to this line (except the CPU itself)
- After a certain number of clock cycles (was it 64?) the CPU will release the RESET line again and will continue to execute the TOS
- BUT: Since your GAL is actually stopping the clock during reset, the CPU is got stuck with the RESET line activated (Low)
- And since there is no clock, the CPU will wait forever to finish those 64 cycles...

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