IDE PROTOTYPE WIP

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IDE PROTOTYPE WIP

Post by exxos » Tue Aug 22, 2017 10:33 pm

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I have been talking to Esa Sorsa about IDE interfaces for some time. He sent me his version where he says it worked reliable. So I took his design, and did what any good engineer does, and added stuff in and made it even more complicated :)

I actually designed 2 IDE interfaces some months ago though never had chance to do anything with it and did not expect to either, well not at least this year. Though with all my projects on hold, due to waiting for PCB's etc, I thought I would make some progress on the IDE design.

One thing not apparent is that my boosters have so far used a simple GAL 22V10. The next chip up (basically more IO power) is the ATF series. Though there are problems in designing stuff with those PLD's. Mostly, the program code is simple, just a few lines of address decoding and basic IO stuff.

The problem is, there is practically no information on how to program the chip, or I should say write code for it. Aside from that, I am not a expert in PLD programming. So when it gets to more complicated stuff, it becomes a huge problem for me. It ends up in the situation of does my idea not work, or is it my coding of my idea which doesn't work.

After a lot of thought, I decided to move to a Altera device. Basically because it has a schematic editor which is pretty straightforward to use. This way, I can run circuit simulations (spice type stuff) and make sure stuff operates how I want in the simulator. Then just copy it all over to the Altera software and I can simply program the chip from that. I don't have to get involved with any code writing at all. I think , for me at least, its the best course of action. At least for the time being. Its a lot easier to design a circuit than basically guess at code all the time.

Everyone else says use the xlinix stuff. Well I really like those chips, but problem is, I just don't have time to learn another IC and would be back to writing code again. There maybe be circuit editor tools for it, I don't know. I did have the software installed once, but it took up so much GB on my SSD drive I just had to uninstall it.

The only issue with the Altera device is stuff like address decoding becomes a bit long winded , I can't just type in address range and have the PLD work with those numbers. In the Altera, I have to do the decoding with logic gates, which makes what was simple stuff, very complicated. Well, maybe not complicated as just, just a little more time consuming.

Of course this got me thinking of using the Altera just for IDE and the ATF for the booster work. I may still do that, not sure yet. I may try to code my IDE into the Atmel with code to keep everything simple. I guess it depends if my circuit will be easy to convert or not. So many choices to make as I do have the booster logic to take into consideration as well.

One thing which has crossed my mind with all this, is that with various different "software" to program PLD's with various manufactures etc, it makes me wonder if just doing circuits would be a better way to go. I mean , circuits are pretty universal. Though if I wrote all this code in WinCupl, then xlinix fans wouldn't understand it. Similar if I wrote in Verilog, the VHDL guys wouldn't understand it. I don't have time to learn VHDL, even though it seems popular. Though everyone likes their own software and uses what they find easy to use.

Point being, if my IDE circuit was published, as a circuit, then anyone could likely convert it over to whatever code they wanted and use whatever IC they wanted. If I just program all this in one IC, then the code and IC likely may not make sense to a lot of people, whereas a circuit probably would. so its not just what I personally want to us, it has to be "future proof" in that people in years to come don't have to re-invent the wheel like I am having to do constantly.

In anycase, I did design a second IDE circuit which has adjustable timers to match proper IDE timing specifications. I think this is the reason a lot of IDE interfaces fail to work correctly as they mostly time to the 8MHz clock, which basically gives you jumps of 125ns or so. Its not really the best timings. Though there is no real way to know what CF card timings are needed without actually trying each one individually. To basically work out what the min and max timings are per brand of CF card.

Though if my "flip flop" IDE is reliable and works with my test CF cards, then I may just stick with that as creating this second more complex "debug IDE circuit" will be very time consuming.

Of course, this is my first IDE design, so will take a while to get around to testing it out (probably neat year). This design will plug ontop of my STE booster so I can do the debugging. I may build up a couple of boards for people to beta test the IDE side. Though ultimately it could be added onto the next series of STE booster. So IDE on its own likely won't go into production.

With so many projects ongoing, this project is actually on hold until I have more time to work on it.

..wrap..
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