I am not much for asking for help since i like to figure things out on my own (and also I'm antisocial as fk).
But in this case I figure it might be smarter to see if anyone would have a super smart idea
Anyway, long story short. Got a 520st for cheap. Turned out to be a bit of a lemon.
Chucked the most excellent diagrom in the machine, one of the dram chips was intermittent and finally died.
Though "to hell with it" and got rid of all the old dram-chips and replaced them with a shiny new 4mb fpm module.
Everything looked ok but it still would not work correctly.
Further poking around showed that cas1l really isn't working correctly. There is some activity but not at all like the other lines.
Looks like the refresh isn't going out that pin.
So.
Option 1, put in sram instead (on the memory side of the address bus), the only other thing that could fight for access to to the data bus would be the shifter. So I'm thinking that I keep the sram enabled in read-mode unless write OR shifter goes into read.
Should work? (i'll have to capture the address from MAD when it is strobed out and select which bank based on which ras is active)
Option 2, keep the dram and somehow work around the defective cas1l, maybe check the address bit for odd/even and implement an extra refresh-
2b. It looks like the actual selects on cas1l are working, so maybe find a way to see if the mmu is in a refresh cycle, in which case, copy cas1h, let the real selects through.
Option 3. get a new mmu
Obviously the most logical solution. Also the least satisfying. And most expensive. Got plenty of everything else I would need. No spare mmu.
Thoughts or insights?
