STE BOOSTER DESIGN PROGRESS
I have been having a lot of thoughts lately about various design issues with the STE booster. For the first part, a few months back I designed a GAL to Atmel adapter board. It never got built (just not had time). Though while the Atmel is just a huge GAL anyway (basically loads more IO ports) I was designing the next gen STE booster to have fast-ram. Though the best SRAM to use for this project was 3.3V. So I was adding in IO translators to adapt 3.3V <> 5V. Nothing really wrong there. Though it does add more cost in PCB space, IC's, soldering, testing etc, and I just didn't want to do that.
I know Xilinx is popular and a lot of people use it. It has inbuilt translators which make it ideal. So I installed the free webpack (all 20GB of it!!) and fiddled with the diagram editor. It was pretty straight forward. Actually looked like the Altera software I am using. Though I couldn't for the life of me work out how to assign pinouts to the diagram to actual IC.
After watching god knows how many videos, looking at various webpages I basically gave up. Turns it it was hidden in a bunch of places and when I finally got the pin editor up, I couldn't work out how to assign pins. Where later it turned out they are drag and drop. It actually seems like nobody has even used the diagram part of the IDE so finding help to use it seems impossible. That is pretty much the problem with coding on the Atmel chip, just impossible to figure out easily how to do anything. In the end, I basically gave up with Xlinx IDE. I just find it very annoying and frustrating to use
I also remember when I was programming my CT60 a while ago, I couldn't get the Xlinx software to work on my main PC. I ended up installing the software on my old laptop which barely decides to boot up these days. It seemed to work ok on that, really old hardware I guess. Though my main PC isn't that new either, but still a quadcore based machine. I can't remember what the issues were. I think the software couldn't find the programmer.
So I decided to go with the Altera MAX7000 series for the moment. I already designed the IDE prototype with it. Though I would also like to try to get the STE booster powered by a Altera PLD. This means my Atmel code on all my previous boosters becomes useless as I will be working with logic chips in the Altera software. So I am having to basically re-invent my own stuff again.
Why would I do that ? Well, as said in blog post somewhere, I am tired of trying to code stuff where I don't know if what I am doing is right, or my "design" simply doesn't work. I mean don't get me wrong, I really like WinCupl and the Atmel PLD's. Though anything past basic IO stuff becomes a nightmare to figure out. Atmel have been helpful in answering my questions. Though often its waiting a day or 2 for a reply. Then the "conversation" can go on for months.. Its just not practical to continue like that. I also have the same feeling with the xlinx stuff.
Though the Altera software, I just started using and got along with it just fine. I mean, I wanted to assign my pins, so I select pin assignments from then menu, what could be easier ?! Saved me 2+ hours of looking on various sites for answers on how to do basic things.
People may think I am mad, though I just prefer to draw circuits than code stuff. I mean its like trying to write a book in ancient Egyptian when you don't have any sort of reference book on it all. Its just madness to try.
Of course, I never used Altera before, but I could just start designing easily and generally just get on with it. Also the circuits I can design in my logic simulator software which I have been using for years. Design and debug, then just copy the circuit over to Altera and program the chip. I mean its a lot easier than fighting with code and syntax of it all. I just feel the Altera is the right move for me to make. So this new PCB is the first step in that direction.
I should be able to translate my previous booster code back over to a schematic in the Altera software. Then see how it behaves in the STE booster board. Once I am happy, then I will continue work on the fast-ram side of things as I can route everything though the Altera chip