ST SHIFTER operation ?

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exxos
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Re: ST SHIFTER operation ?

Post by exxos » Sun Oct 29, 2017 11:57 am

Smonson wrote:
Sun Oct 29, 2017 11:43 am
I understand - I know you have been trying very hard in the past to improve the ST's clock speed, and the current shifter just gets in the way of that. It would be great to have a more configurable shifter/MMU combo so that when you're running at 16MHz you could execute a LOAD only every 4th bus cycle instead of every 2nd. Alternatively you could clock the shifter every 2nd cycle, as it is now, and have a 256-colour lo-res video mode, or 4 colour 640x400, etc. I think that's very achievable.
Still working on increasing the clock speeds :). Just to catch you up, we are double clocking their MMU, and the CPU. So this doubles the data rate to the shifter. A side note is that I'm also working on 32 MHz for the ST FM. I have done this for the STE already, but the ST FM is a lot more problematic. But shifter and MMU will be bottlenecked at double overclock for obvious reasons..

Ultimately again, if we had a new MMU and shifter we can have access to 32 MHz speeds. Resulting in quadruple data rate to the shifter. But of course this is properly going to be some time away.

Extra video modes of of course have been documented somewhere in this thread, so like you say we can have a 256 colour low res, or extra horizontal resolution instead. Of course I was also thinking of other methods of improving the video output without using more bandwidth, and trying to do a basic chunky mode as well.
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

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guus.assmann
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Re: ST SHIFTER operation ?

Post by guus.assmann » Sun Oct 29, 2017 8:35 pm

Hello Exxos,

Have you seen this tread?
http://atari-forum.com/viewtopic.php?f=15&t=32445
Maybe some exchange would help both projects?

BR/
Guus

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Maeke
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Re: ST SHIFTER operation ?

Post by Maeke » Sun Oct 29, 2017 9:27 pm

guus.assmann wrote:
Sun Oct 29, 2017 8:35 pm
Hello Exxos,

Have you seen this tread?
http://atari-forum.com/viewtopic.php?f=15&t=32445
Maybe some exchange would help both projects?

BR/
Guus
We already know what will happen if exxos go write in this thread, there's a reason why he created this forum.
If i take too long to reply, sorry my cat is sleeping on my laps.

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Re: ST SHIFTER operation ?

Post by exxos » Sun Oct 29, 2017 9:57 pm

guus.assmann wrote:
Sun Oct 29, 2017 8:35 pm
Have you seen this tread?
http://atari-forum.com/viewtopic.php?f=15&t=32445
Maybe some exchange would help both projects?
He posted here already...

viewtopic.php?f=29&t=330
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

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Re: ST SHIFTER operation ?

Post by exxos » Mon Oct 30, 2017 8:26 pm

Not had time to work on this over the past few days, but have made a small change to the palette register operation..

Basically the second latch bank I realised I do not actually need. So I just replace them with another bank of tri-state buffers. So the 244 buffers control the pixels on the screen. The top bank of 244 buffers are as before, and provide the data read back of the register. Write operations implicate directly into the 373 latches as before.

I'm assuming that tri-state buffer will use less resources than using a latch. It may or may not be that much, but if we are thinking of having 256 colour registers, then a few transistors less per block would soon add up..

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Re: ST SHIFTER operation ?

Post by exxos » Tue Oct 31, 2017 8:37 pm

Now added in the 16 colour palette registers. I drew these lengthwise, as I plan to add 15 more banks for 256 colour palettes.

I have not yet wired in the address select registers. Will try and do that later this week some time.


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(To view a larger image, click on the image, then right click and select open image in new tab, then you can zoom in on the image.)
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

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Re: ST SHIFTER operation ?

Post by exxos » Tue Oct 31, 2017 9:49 pm

Brain Fart time..

111.jpg
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Five address lines for the CPU to access each register. As these are in 16-bit chunks, I skip every other address, basically skipping all the odd addresses. I'm assuming here the shifter should not be really accessing those anyway.

So we have addresses from 0 to 15 for the palette registers.

but, this means this address below isn't internal to the shifter ?!

22.jpg
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I was actually assuming it was, as the shifter would need to know which bit planes to shift or not surely ? I can only assume I misunderstand something here ?!

Maybe I should be decoding every individual address from 0-15 and not skipping any address line decoding ?, and the shifter actually then holds another 16 addresses, where the image above is address 16 in the following registers are also internal to the shifter..
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4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

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Smonson
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Re: ST SHIFTER operation ?

Post by Smonson » Tue Oct 31, 2017 11:44 pm

exxos wrote:
Tue Oct 31, 2017 9:49 pm
Maybe I should be decoding every individual address from 0-15 and not skipping any address line decoding ?, and the shifter actually then holds another 16 addresses, where the image above is address 16 in the following registers are also internal to the shifter..
Hi Exxos, the shifter gets A1-A5 rather than A0-A4, so the odd addresses are already excluded.

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Re: ST SHIFTER operation ?

Post by exxos » Wed Nov 01, 2017 9:19 am

Smonson wrote:
Tue Oct 31, 2017 11:44 pm
Hi Exxos, the shifter gets A1-A5 rather than A0-A4, so the odd addresses are already excluded.
The shifter does get A1-5 (its just internal bus names which are called 0-4). I think I confused 8bit and 16 here, as each address should be 16bit AFAIK. So I should decode all 32 16bit address lines for 32 registers.
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

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Re: ST SHIFTER operation ?

Post by keli » Wed Nov 01, 2017 11:43 am

exxos wrote:
Wed Nov 01, 2017 9:19 am
Smonson wrote:
Tue Oct 31, 2017 11:44 pm
Hi Exxos, the shifter gets A1-A5 rather than A0-A4, so the odd addresses are already excluded.
The shifter does get A1-5 (its just internal bus names which are called 0-4). I think I confused 8bit and 16 here, as each address should be 16bit AFAIK. So I should decode all 32 16bit address lines for 32 registers.
Without checking, I'm afraid that the GLUE will only activate /CS for the first 17 of the 32 available addresses. If you try accessing the registers at 0xFF8262-0xFF826E frome code on an STF, do you get a bus error or will the /CS pin on the Shifter be pulled low?

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