DFB1r4 design discussion thread

General discussions or ideas about hardware.
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Badwolf
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Re: DFB1r4 design discussion thread

Post by Badwolf »

Wow. That just worked!


IMG_4750.jpeg
IMG_4750.jpeg (135.09 KiB) Viewed 1909 times


(~45MHz)

BW
DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
DSTB1 Open source 16Mhz 68k and AltRAM accelerator for the ST
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
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exxos
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Re: DFB1r4 design discussion thread

Post by exxos »

:cheer: :cheer: :bravo:
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viewtopic.php?f=17&t=1585 Have you done the Mandatory Fixes ?
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Steve
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Re: DFB1r4 design discussion thread

Post by Steve »

Time to request a name change from 'Badwolf' to 'Bestwolf' :lol:
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Icky
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Re: DFB1r4 design discussion thread

Post by Icky »

Great work @Badwolf.

It's usually inevitable there will be bodge wires on the first revs or versions of boards. @exxos and I have had many boards where we have hooked up the wrong way or the Eagle lib has got a bad foot print etc.

At least you have ironed these out and a new rev / version is now on the cards. Looking forward to see the final product. :)
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JezC
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Re: DFB1r4 design discussion thread

Post by JezC »

Looks really promising!
This could become the go to for readily available Falcon accelerators.

Well done @Badwolf :mrgreen:
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Badwolf
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Re: DFB1r4 design discussion thread

Post by Badwolf »

Thanks guys. Something doesn't seem happy at 50MHz yet (100MHz clock). It *runs* at that speed, but won't boot.

If I power it up, then wind up the wick to 100MHz it seems happy and stable until I press CTRL-ATL-DEL. Might have a look at Exxos' reset circuit fix in case it's related, but I can't see how that'd know about the speed of the CPLD(!)

Next up is the flash ROM.

After that, the FPU. That's the big new thing with this board and I'd put my chances of *not* blowing up my chip at one in three at best! I hear it's sensitive to clocks or lack thereof...

Lastly, with luck, I'll look into optimisations on SDRAM access times. Current implementation is slower than rev 3a on account of being optimised to fit in a 144 CPLD. I'm starting to think targeting the 144 might be a bit optimistic.

Edit: I forgot DSP! That's a big one. Couldn't make it work on the rev3b2, although it did work on the rev3. Odd, that.

BW
DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
DSTB1 Open source 16Mhz 68k and AltRAM accelerator for the ST
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
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frank.lukas
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Re: DFB1r4 design discussion thread

Post by frank.lukas »

ATARI Mega STE boots always up with 8Mhz and Cache off. I not know what the Atari Falcon do ?
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Badwolf
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Re: DFB1r4 design discussion thread

Post by Badwolf »

frank.lukas wrote: Sat Sep 25, 2021 11:39 am ATARI Mega STE boots always up with 8Mhz and Cache off. I not know what the Atari Falcon do ?
Boots at 8MHz, yes. Not sure about cache. Physically CIIN is NC on the Falcon.

I'm seeing some issues with the AltRAM today -- Doom is hanging, MiNT throwing a few errors. I think the CPLD may be overcooking.

BW
DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
DSTB1 Open source 16Mhz 68k and AltRAM accelerator for the ST
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
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frank.lukas
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Re: DFB1r4 design discussion thread

Post by frank.lukas »

Badwolf wrote: Sat Sep 25, 2021 12:48 pm
frank.lukas wrote: Sat Sep 25, 2021 11:39 am ATARI Mega STE boots always up with 8Mhz and Cache off. I not know what the Atari Falcon do ?
Boots at 8MHz, yes. Not sure about cache. Physically CIIN is NC on the Falcon.
You can switch the 030 Cache via Software ON or OFF, do you?

Via code in the CPLD without use the CIIN pin ...
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Badwolf
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Re: DFB1r4 design discussion thread

Post by Badwolf »

frank.lukas wrote: Sat Sep 25, 2021 12:54 pm You can switch the 030 Cache via Software ON or OFF, do you?
Via code in the CPLD without use the CIIN pin ...
Sorry, I'm not 100% sure I understand your question or why you think it's significant.

I leave cache control to the OS. But if you're asking if I'm seeing the AltRAM issue with the cache off: yes I do.

I'm not too concerned about the AltRAM at the moment as I'm going to rewrite the controller again for this board (different capabilities). I'm more upset it can't even get out of reset above 45MHz -- that seems odd.

Cheers,

BW
DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
DSTB1 Open source 16Mhz 68k and AltRAM accelerator for the ST
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
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