DFB1r4 design discussion thread

[Badwolf]

...and having seen the difference in price for a 4 layer board versus a 2 layer at JLC, I now remember why rev 3 was only 2 layer.
BW

[exxos]

Yep. Most of my stuff is 4 layers now. Even my DULATOS boards are 4 layers these days. After being stung by 2 layer boards costing me £100's, cheaper in the long run just to do it right in the first place.

[Badwolf]

So after a few different sanity checks this is what I currently have.

Screenshot 2021-08-17 at 12.23.54.png (662.93 KiB) Viewed 2198 times

I've changed from my old Atmel JTAG connector to the straight-six used by the TF boards (why not?), but otherwise everything else checks out.

Compiling the (very basic) firmware I'm using for DFBr3b2 with the pinouts used by this board results in a successful build and it (just) fits in an XC144XL.

Screenshot 2021-08-17 at 12.30.19.png (85.6 KiB) Viewed 2198 times

My cardboard cutout version seems to sit clear in the Falcon too -- PSU, hard drive mount and all. The top shielding is a no-no, obviously.

My only real outstanding niggle is should I switch to a through-hole PLCC socket. I used the SMT one out of habit, but they are a bugger to solder.

BW

[Badwolf]

Through-hole PLCC socket version.

Hmm. Better?

Screenshot 2021-08-17 at 14.14.18.png (675.78 KiB) Viewed 2191 times

BW

[exxos]

Looking good

[Badwolf]

Bugfix!

I had considered going 32-bit on my flash ROM and had started relabelling my ROM sheet for upper and lower word chips. I'd dropped the idea as I was tight on board are, it'll be cheaper with a single chip and whilst the speed boost would be considerable, the flash ROM is only an option, so I didn't think it worth it.

However I forgot I'd started this and had laid up the board with (chip) A0 wired to (CPU) A2. Oopsie!

Glad I spotted that one as a bodge wire on those pins would have been very awkward.

Current version:

Screenshot 2021-08-17 at 20.42.11.png (31.98 KiB) Viewed 2167 times

I also had a change of heart over splitting the RW line into booster-side and Falcon-side. Why add complexity, I thought? So now the boards RW line is directly connected to the expansion XRW header again.

But three changes of heart (RW, JTAG header and socket type) and a major bug spotted in one day have put me off ordering for today. Think I'll give it another 24 hours to pick up further booboos.

BW

[Badwolf]

More changes to the ROM schematic and board:

Screenshot 2021-08-18 at 17.34.13.png (73.74 KiB) Viewed 2139 times

RS won't have any 512kB 5V Flash ROMs in stock until December. They might have some 1MB ones in October, though...

Why not route one extra address line to the CPLD to allow ROM bank switching or even support for the new 1MB EmuTOS?

Can't hurt, can it?

BW

[Badwolf]

Well, the button has been pressed. The order is in.

Cost me 4x what the rev3 did. Half of that is on going four layer, the other half is extra fees & taxes. This is getting too expensive!

BW

[exxos]

Cost me 4x what the rev3 did. Half of that is on going four layer, the other half is extra fees & taxes. This is getting too expensive!

Know that feeling!

[Badwolf]

Cost me 4x what the rev3 did. Half of that is on going four layer, the other half is extra fees & taxes. This is getting too expensive!

Know that feeling!

I've checked everything I can think of twice and even went to the extent of 3d printing a fake board yesterday to follow up from the cardboard one to make sure the damned thing will fit!

IMG_4578.jpeg (202.73 KiB) Viewed 2099 times

I hope to christ this one works!

BW