exxos wrote: ↑Thu Sep 16, 2021 3:11 pm
Badwolf wrote: ↑Thu Sep 16, 2021 2:58 pm
I hacked a very quick AS assertion test but that *also* seemed to fail.
Doing what exactly ?
* Stock Bus Arb to gain bus mastery.
* 9 bit counter on xcpuclk held at 0 when RST low.
* Assert A=31'h0 when I'm bus master, 31'hz otherwise.
* Assert AS, UDS and LDS when 1) I'm bus master and 2) when certain bits are set (off the top of my head something like counter[7] == 1'b1 -- so that it's asserted for 128 clock cycles every 512, for example -- enough time to see the bus error).
* Monitor AS, XDTACK, BERR, XBGK and BMODE (the latter two good indicators of bus mastery being negotiated properly).
But I was very rushed with this last night so didn't rig up a the logic analyser, just probed one at a time. That's next so I can record them all in parallel.
BW
DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
DSTB1 Open source 16Mhz 68k and AltRAM accelerator for the ST
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark