Mega ST project
- frank.lukas
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Re: Mega ST project
Take the Blitter out ...
- HigashiJun
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- Joined: Fri Jun 19, 2020 7:21 am
- Location: Tokyo
Re: Mega ST project
Thank you Darklord, but as you wrote, I have these in my Atari related documents.
- HigashiJun
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Re: Mega ST project
@Badwolf @frank.lukas
So the blitter has to be disabled even if I use the PAK68/3 with jumper J5 removed (= PAK disabled) ?
So the blitter has to be disabled even if I use the PAK68/3 with jumper J5 removed (= PAK disabled) ?
Re: Mega ST project
Blitter doesn't matter beyond 32Mhz anyway.
- HigashiJun
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- Location: Tokyo
Re: Mega ST project
Well, I had the same opinion, but it seems it does matter.
Once the blitter removed, I can access the upper menu without freezing my Mega ST.
It sometimes freezes later, but I guess it is due to the fact I have temporarily "soldered" the two blitter pads with some wire and tape.
- frank.lukas
- Posts: 664
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Re: Mega ST project
I have two machine with PAK68/3 stuff and all work very stable and well ...
What are your pullup resistors for data and address lines? You must remove the Blitter chip.
Ask "pakman" for the latest JED GAL Files over the atari-forum.com ...
What are your pullup resistors for data and address lines? You must remove the Blitter chip.
Ask "pakman" for the latest JED GAL Files over the atari-forum.com ...
- HigashiJun
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- Location: Tokyo
Re: Mega ST project
frank.lukas wrote: ↑Sat Nov 06, 2021 2:08 pm I have two machine with PAK68/3 stuff and all work very stable and well ...
What are your pullup resistors for data and address lines? You must remove the Blitter chip.
Ask "pakman" for the latest JED GAL Files over the atari-forum.com ...
The blitter chip is now removed.
My pull-up resistors are all 2.2K.
I have downloaded the last JED files on the wrsonline.de website. Do you mean there are newer ones ?
- frank.lukas
- Posts: 664
- Joined: Fri Jan 19, 2018 11:52 am
Re: Mega ST project
good
too much for my feeling
Holger is working always on it. Ask him ...HigashiJun wrote: ↑Sat Nov 06, 2021 10:00 pm I have downloaded the last JED files on the wrsonline.de website. Do you mean there are newer ones ?
Try it with the old JED with 32Mhz or 40Mhz first
- HigashiJun
- Posts: 1215
- Joined: Fri Jun 19, 2020 7:21 am
- Location: Tokyo
Re: Mega ST project
frank.lukas wrote: ↑Sun Nov 07, 2021 8:57 amgood
too much for my feeling
Holger is working always on it. Ask him ...HigashiJun wrote: ↑Sat Nov 06, 2021 10:00 pm I have downloaded the last JED files on the wrsonline.de website. Do you mean there are newer ones ?
Try it with the old JED with 32Mhz or 40Mhz first
Thank you Frank for this information.
I have already tried the old JEDs (before burning the new ones) with a 32 Mhz oscillator and the result was the same.
I think 2.2K pull-ups are a sweet spot for all STs with modern stuff like Ultrasatan and other. I had my STE booster working great without them, but when I wanted to access my Ultrasatan, a lot of errors occurred.
I am now waiting for the "F" type line drivers to be delivered. They should arrive soon.
- frank.lukas
- Posts: 664
- Joined: Fri Jan 19, 2018 11:52 am
Re: Mega ST project
PAK FAQ ...
The mainboard RAM is probably too slow; 100ns is the absolute maximum for the current GAL rate, better 80ns; together with a PuPla / 2 the mainboard RAM should be as fast as possible!
The board termination is not sufficient. Especially with a 50MHz PAK clock, the address termination on the board should be 3k3 and the data termination 4k7. Should only appear on older computers (520, 1040), as these are still partially terminated with 10k.
The clock line of the PAK is not terminated correctly or not at all. Unfortunately, the 68030 is quite a mimosa when it comes to the clock. If this is not absolutely clean, there are the greatest problems
The mainboard RAM is probably too slow; 100ns is the absolute maximum for the current GAL rate, better 80ns; together with a PuPla / 2 the mainboard RAM should be as fast as possible!
The board termination is not sufficient. Especially with a 50MHz PAK clock, the address termination on the board should be 3k3 and the data termination 4k7. Should only appear on older computers (520, 1040), as these are still partially terminated with 10k.
The clock line of the PAK is not terminated correctly or not at all. Unfortunately, the 68030 is quite a mimosa when it comes to the clock. If this is not absolutely clean, there are the greatest problems