CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Information and news about the 68SEC000 64MHz booster.
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exxos
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos »

https://www.mouser.co.uk/ProductDetail/ ... xJG56nE%3d

Only really those as a option.. has to be 5V... no 16bit, so have to use 2 of those for 16bit. either TSOP or PLCC.... PLDD is cheaper.. I guess it depends which is easier to physically fit on the PCB.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos »

A quick measure on a STFM to the KB post hole (shown in white line on the right)... clearly the 2 flash chips should be able to fit on this board just fine!

Capture.JPG
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by PhilC »

Just out of interest, what about in a Mega and clearance for things like the expansion port etc.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos »

Forgottenmyname wrote: Mon Nov 19, 2018 11:14 am Just out of interest, what about in a Mega and clearance for things like the expansion port etc.
No clue. Don't plan in looking into it TBH. Assume it won't fit.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by PhilC »

Will let you know when I get my hands on one. Aren't the CPU sockets the other way round? So should clear it?
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos »

Forgottenmyname wrote: Mon Nov 19, 2018 11:30 am Aren't the CPU sockets the other way round?
I think so yes.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos »

Looks like it routes reasonably well..

2.JPG
2.JPG (64.54 KiB) Viewed 3618 times

The next issue is what to do with the ROM select and bank select address lines..

Probably they will have to be a jumper select CE to the ROM or FLASH.

Jumpers would work for the flash as well, there will be 4 FLASH banks, so to address lines will need to be selected.

I think it is a little messy using jumpers as not all flash banks could be programmed in one go. It may have to stop like that for now until I can think of a better solution for it. I guess I could route the two address lines to the PLD, and also route the jumpers to the PLD, so that the PLD can bypass whatever jumper setting is set during programming. Then in effect all 4 flash banks can be programmed in one go.. I guess it is no hardship to change the jumpers during programming anyway.

EDIT:

I guess ultimately there will be no need for the PLCC ROM.. but until the flash rom stuff is tested and verified, its better to have the PLCC as at least it can allow me to test the booster while not having to worry about the flash stuff.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by PhilC »

Don't forget your dark glasses whilst programming those flash bangs :D
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by PaulJ »

Forgottenmyname wrote: Mon Nov 19, 2018 11:30 am Will let you know when I get my hands on one. Aren't the CPU sockets the other way round? So should clear it?
Looks like it will fit because the major over hang is toward the prom chips. The issue looks like the fast rom card will conflict. We can make that work.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by JezC »

exxos wrote: Sun Nov 18, 2018 11:26 pm https://www.mouser.co.uk/ProductDetail/ ... xJG56nE%3d

Only really those as a option.. has to be 5V... no 16bit, so have to use 2 of those for 16bit. either TSOP or PLCC.... PLDD is cheaper.. I guess it depends which is easier to physically fit on the PCB.
Well, if the programming algorithm for those is the same as the AMD29F040, it might be pretty easy...those are the first flash devices l used almost 30 years ago... :lol:
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