A600 CPU adapter (PLCC to DIP64)

TF530 - 63030 + RAM Board

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Re: Compatibility issues with TF530/TF534 and A600?

Post by terriblefire » Fri Jan 18, 2019 10:36 pm

Ok nothing obvious. so slap DiagROM in it and see if anything is starting.

Be nice to know if that 68000 PLCC is getting hot.
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Re: Compatibility issues with TF530/TF534 and A600?

Post by kludge » Fri Jan 18, 2019 10:45 pm

terriblefire wrote:
Fri Jan 18, 2019 10:36 pm
Ok nothing obvious. so slap DiagROM in it and see if anything is starting.

Be nice to know if that 68000 PLCC is getting hot.
I'm almost relieved that you didn't see anything obvious. :D

My DiagROMs are at Chucky's being updated. I'll try it when I get them back.

I can try to check if it's getting hot, but the heat will have to go through the PCB, so it might be a bad idea to let it heat up that much. I think I'll start by checking the pinout of the up-side-down PLCC socket. Again.

Thanks for checking, anyway!
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Re: Compatibility issues with TF530/TF534 and A600?

Post by terriblefire » Fri Jan 18, 2019 11:00 pm

You could try a continuity test from the 68000 socket to known pins on the 600 mobo.

http://www.amigapcb.org/ has a A600 for reference
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Re: Compatibility issues with TF530/TF534 and A600?

Post by kludge » Fri Jan 18, 2019 11:12 pm

terriblefire wrote:
Fri Jan 18, 2019 11:00 pm
You could try a continuity test from the 68000 socket to known pins on the 600 mobo.

http://www.amigapcb.org/ has a A600 for reference
I used that for checking the pinout of the upside down PLCC socket, but good idea to use it to measure from the DIP socket!
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Re: Compatibility issues with TF530/TF534 and A600?

Post by kludge » Sun Jan 20, 2019 9:52 pm

Update: Measured from the DIP socket to corresponding pins on the motherboard (except DTACK as I didn't feel like prying the motherboard out of the case again). Everything seems to check out. _BG, _VMA, _E and _FC0-2 doesn't seem to be connected anywhere according to Amiga PCB Explorer.

I'll keep messing around to see if I can figure out what's going on.
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Re: Compatibility issues with TF530/TF534 and A600?

Post by kludge » Mon Jan 21, 2019 9:33 am

https://computerarchive.org/files/comp/ ... Course.pdf
The system Halt line is used by the PICs to halt and tri-state the 68000 at the end of the current bus cycle.
The quote is from the chapter "EXPANSION BUS COTROL SIGNALS", and I don't know if the expansion bus HLT is the same as the CPU HLT, but it might not be as easy as just connecting +5 to HLT and be done with it... I assumed that the HLT signal was some fancy souped up variant of a chip enable, but there might be more to it.

Just thinking out loud. :)

Edit: There might be more to this... https://retrocomputing.stackexchange.co ... s-work/444

Edit again: http://eab.abime.net/showpost.php?p=355492&postcount=34
When you remove the original CPU, then there are no issues with two CPUs trying to control the bus at the same time. However, when there are two CPUs, only one can be in control.

Initially, the original CPU will start up and begin executing code. At the same time, the accelerator board (not the new CPU, just some logic chips) will assert the bus request (BR) signal and wait for the original CPU to assert bus granted (BG). I believe the new CPU should be held in reset until the bus is taken over.

Once this happens, the board asserts bus grant acknowledge (BGACK) and is now in control of the computer. The original CPU will do nothing now. I think you have to assert HLT to the original CPU at this point to keep it from doing anything permanently, then let the new processor come out of reset.

Complicated, isn't it? Keep in mind that I have never designed an accelerator board, I'm just trying to make sense of what Oli posted at A.org.
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Re: Compatibility issues with TF530/TF534 and A600?

Post by kludge » Mon Jan 21, 2019 11:49 am

Plan A. Keep holding the PLCC HLT low, but tie the DIP HLT to RST. Probably won't work, but it's easy.

Plan B. Hold BR low, and tie BG to BGACK. See what happens. Will probably have to sort out the DIP RST as well. Probably won't work either.

Plan C. Build something with 74 logic.

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Re: Compatibility issues with TF530/TF534 and A600?

Post by terriblefire » Mon Jan 21, 2019 3:07 pm

Halt should do what you want if Low. The new cpu halt needs to be held high though as it doesn’t float.
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Re: Compatibility issues with TF530/TF534 and A600?

Post by kludge » Mon Jan 21, 2019 3:36 pm

terriblefire wrote:
Mon Jan 21, 2019 3:07 pm
Halt should do what you want if Low. The new cpu halt needs to be held high though as it doesn’t float.
That was my guess, but I don’t really know this stuff :)

The weird thing is that’s the way it’s connected now. I’ll try again to see if I just have a bad connection somewhere between the 68000 DIP64 and the DIP socket.

Anyway, thanks for putting up with my guesswork :)
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Re: Compatibility issues with TF530/TF534 and A600?

Post by kludge » Mon Jan 21, 2019 9:44 pm

Tried again. No dice. Tried the following:

1. No DIP, A600 HLT set high. Works.
2. A600 HLT set low. DIP HLT set high. Doesn't work.
3. A600 HLT set low. DIP HLT tied to RST (As I read somewhere that you shouldn't assert RST without asserting HLT. Or something.). Doesn't work.

DIP 68000 works in A500, so there's nothing obviously wrong with the chip.

I think I'll have to read up on this and hook up the oscilloscope. I don't think my Chinese logic analyser is up to the task, but maybe.

Anyhow, this wasn't as easy as I had hoped. :D

(Also tried tying BR to GND and BG and BGACK to each other as an ugly ass attempt at faking a bus request, but then I forgot that I probably would need to do something about the reset line and that there should be some kind of delay between BG and BGACK, so I won't tell you about that.)
A kludge is a workaround or quick-and-dirty solution that is clumsy, inelegant, inefficient, difficult to extend and hard to maintain.

My lack of focus:
[ 3 * Amiga 500 ][ Amiga 500+ ][ Amiga 600HD ][ Amiga 2000 ][ Amiga 4000/030 w/ 64 MB RAM hack ][ CD32 (NTSC) ][ VIC-20 ][ 4 * C64 Breadbin ][ 2 * C64C ][ 2 * C128 ][ Mac Classic ][ Mac Classic II ][ Mac Colour Classic ]

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