Are you supplying the MMU enabled '030 with your kits so we can all share the joy?
Dan.
Atari 1040^W4160 STe, 800XL (Ultimate 1Mb/SIDE2), 2600, Amiga 1200 Tower (Apollo1260/66Mhz), A1200, CD32, 3 x A500, 2 x A500+ (TF534), Archimedes A310, 16 x Speccies, 2 x BBC Micro, 2 x Sam Coupé, QL, ZX81, Osborne Executive, TI-994/A, Videopac G7000, PS1, PS2 Fat&Slim, Megadrive, NES (RGB), SNES, N64 (RGB), GC, GBC, OG Xbox, Xbox 360, Wii etc. etc. and anything else that has pixels like Lego bricks.
Sure, Dan, shipping TF534 with MMU CPU is probably the best way to go.
Was just curious about. There was no noticeable changes on TF530 using MMUless CPUs. IDE speed was pretty the same..donno why..maybe because of burst mode..
Not really, it was the exact same thing on the 530, without MMU you'd only get about 1.5 mb/s, with and in combination with CPU Fastrom you'd get 6.5 mb/s.
alenppc wrote: ↑Tue Mar 19, 2019 2:39 pm
Not really, it was the exact same thing on the 530, without MMU you'd only get about 1.5 mb/s, with and in combination with CPU Fastrom you'd get 6.5 mb/s.
Yes. MMU is needed for CPU fastrom to work.
EDIT: I’ve repeated this so often and it’s so obvious when you think that without the MMU the rom can’t be remapped in RAM
———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
I was looking at the alliance memory and noticed the AS6C1608 which is a 2kx8 instead of 1kx8 in the same TSOP44 package. I did notice that the XC95144XL-TQ100 did have a few unused pins. I know that the CPLD is nearly full up on code but if we used the XC95288XL version could an A20 signal for the ram be generated and hence double the RAM capacity of the TF534? I am in not way familiar with CPLD's and the intricacies of what you are doing within the CPLD. It was more of a question on if it could be done/tested with minimal effort.
Find me a source selling them in a 5V variant.. I couldn’t.
it’s not a technical issue. It’s an availability issue.
To make the upgrade it’s just an addition of one address line. No new lines needed to the CPLD.
EDIT: I exhausted this subject on multiple forums now. To get more ram you need bus buffers. At that point you may as well use SDRAM.. hence the TF330.
———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
I did find ly62w20488ml-55lli from lyontek which can be purchased at Farnell (https://uk.farnell.com/lyontek/ly62w204 ... dp/2253669), but I would consider it cost prohibited. I thought the CPLD was interfacing the ram at 3.3v and the bus driver on the TF534 was to boost the data lines back to the CPU. I am really out of my depth when it comes to what you have accomplished. Appreciate everything you have done and sorry I made you repeat yourself.
The CPLD does talk to the Ram at 3.3V but all of the address lines and data lines come from the CPU directly at 5V. That would be 62 wires that need buffered to get 3.3v to work. The data bus is 32bits wide. the buffer just isolates the Amiga from the accelerator.
I've exhausted this subject... The SDRAM is the direction I decided to move in.
There will be no more updates to the TF534. I almost didn't release it because I didnt want people moaning about the 4Mb.
Anyone who wants to hack a tf534 is welcome to but dont have time to them do that. There are too many other plates spinning.
———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
