V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Help & information about the V2.5 booster.
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exxos
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V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Mon Aug 21, 2017 1:16 pm

48440b4049e00b5130dd1d4652883f5f.png
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I actually wasn't planning to produce the V2 booster again. Though a chap said he is interested in them to mod machines with. Though as they are "out of stock" now it caused a bit of a problem. Firstly, a batch of 25-50 PCBs of 6 layers isn't cheap. The production run would be well over £1,000. So it just wasn't viable to produce them considering sales are generally slow with boosters.

I had already spent some time tweaking the V2 design to use just 2 GALs instead of 1. Though in the end, I found it just couldn't be done. Just not enough IO pins :(

All 3 GAL's are basically chained in series for the logic operations, which doesn't help with trying to push into 32MHz speeds. In theory, it should run at 32mhz, but even the 32MHz drive on the STFM is so bad, it can only just drive the shifter, nevermind a extra gate in a PLD.

The STE had a buffer to do that job. So I made 2 previsions with this design. Buffering the 32MHz clock by the shifter, or just using a 32MHz oscilator. The fallback is just using 16MHz.

Now while the STE booster works at 32MHz, the STFM has more screwy timings to contend with. This makes 32MHz more of a problem. I stopped work on this project for a long time as I just didn't have time (or really any interest at the moment) to finish the beta board off. Though now it has just gone off to fab.

This new board uses a large Atmel PLD. I have used it before on my dev-system board. Though even that I have not been able to run 32MHz. Though I made some more previsions with this new V2 design (dubbed V2.5) to run /DTACK via the PLD so I can stall the CPU a little and hopefully this will get 32MHz working. Though as time is a factor. I don't know when I will get time to write the new code or try it out. Though in theory, getting it running as 16MHz shouldn't take to long. Assuming I've not screwed up anything in the mad rush to complete the design.

The boards can be made in batches of 3 now. So while I don't have to spend £1,000+ on a new batch, the price per PCB is a lot higher. This means the booster end price will be a fair bit higher. Though I am not even sure if I will sell these myself for my store or not yet.

There was some previsions also to adapt the booster logic for software switching. I did some draft designs several months ago and started to route the PLD logic. Though that is as far as it got. I can't even remember how I was planning to go about it now. But its possible firmware updates for the V2.5 could be done to add features or "fixes" for 32MHz speeds in the future (if solvable).

As for the software switching. I think there was plans to have my own "exxos register" somewhere to allow the booster to be turned on or off. Really this is just a bypass for the toggle switch, where that bit is mapped to a register in the memory map somewhere. A latch in the PLD and some logic to route to the switching code shouldn't really be a problem. I actually routed 8 data bits to the PLD for maybe other use such as ROM switching.

One thing to bare in mind, is settings are not stored anywhere. So once the machine is powered down, the defaults would be selected again. Though I do not have any plans to do another V2 design, as the STE booster should have similar logic and the settings will be stored in the RTC NVRAM. Though it is likely a long way off before that project is completed.

Overall, this V2.5 booster is a clone of the V2.2 booster, only using a more advanced PLD with a lot more IO power for various "possible" features at a later date.
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

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Re: CURRENT PROTOTYPE STATUS

Post by exxos » Tue Sep 05, 2017 7:09 pm

In light of the "PLCC SOCKET NIGHTMARE" I got side-tracked with this booster... Read about the PLCC socket issues here..viewtopic.php?f=23&t=74

So now the evil socket is removed and "good" socket now in place.

I opted to hack the plastic and remove the pins one by one to prevent damage to the PCB pads.

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Original socket.

IMG_1831.jpg
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Hacking out start..

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Pins out..

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Solder out...

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New socket in.

So I need to connect up my Atmel programmer and re-do the firmware. First will start with a "stock 8mhz" firmware to make sure the board is all working and stable before adding the booster code. Probably be a few days before I get chance to continue with this properly.

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Board in place..

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Well a good start.. well maybe not as that is as far as it went, then did not work at all after that. Need to re-vist what firmware is in there me thinks :lol:
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

https://www.exxoshost.co.uk/atari/ All my hardware guides - mods - games - STOS
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Re: CURRENT PROTOTYPE STATUS

Post by exxos » Tue Sep 05, 2017 9:22 pm

OK, a small update, which was annoying. 8MHz worked with the TTL CPU, but not the HC CPU. After some messing about, having the scope probe on the 8MHz clock line resulted in problem solved, or a 1K pull up on the 8MHz clock.
8mhz-min.png
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Only thing I saw was some small noise on the 8MHz low. Seems to get worse when the floppy drive is running, or the machine is booting. On desktop sat doing nothing, the noise isn't there.

As the scope probe adds a few pF, it would snub some noise, also delay the 8mhz clock a fraction. The 1K pull up would speed up the 8mhz clock (well only by 1ns or so on rise time that is) but also seems to solve this issue. As both methods work, it can only be the noise on the 8mhz clock causing issues.

I probably did not see this problem on the V2.2 booster as the GAL's used are older and probably slower, and less prone to noise. The Atmel ATF is a fast device, newer technology and probably throws a fit with the noise.

It just goes to show, that even though I have been producing boosters all this time, it never hurts to go right back to basics on every new design and debug and test each step!
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

https://www.exxoshost.co.uk/atari/ All my hardware guides - mods - games - STOS
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Re: CURRENT PROTOTYPE STATUS

Post by Maeke » Tue Sep 05, 2017 11:16 pm

:goodpost: :bravo:
If i take too long to reply, sorry my cat is sleeping on my laps.

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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Thu Sep 07, 2017 11:22 am

The "in line" resistor in series with the 8MHz clock has been changed from 68R to about 150R. Now the booster is happy running at 8MHz mode :)

TOS206 seems stable also :)

Next up to try and add some 16MHz booster logic. After that, I want to try re-routing the 32MHz shifter osc though the booster board to buffer it. I really hope this design will function at 32MHz!
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

https://www.exxoshost.co.uk/atari/ All my hardware guides - mods - games - STOS
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Thu Sep 07, 2017 3:45 pm

More updates.. not good :roll:

Oddly TOS104 wasn't working, it kept coming up the TOS206 fuji which made so sense, then either nothing, or bombs. New ROM later, and I went back to a "stock" 8mhz system, where the PLD does nothing at all, other than buffer the 8mhz clock. I'm using the motherboard ROM's as well, and the machine is unstable.

Again with it will only boot with a 1K pull up on the 8mhz clock (generated from MMU) which makes no sense. I tried higher and lower value resistors in the 8MHz clock to the PLD and that no longer seems to help. Oddly it gets to desktop without loading desktop.inf with 1K pull up on the 8mhz clock...

I plugged in a V2.2 booster into this motherboard and that boots up just fine.

The whole code for the V2.5 is..

CPU_CLK = CLK8 ;
CPU_DTACK = ST_DTACK ;
ST_AS = CPU_AS ;
BG_SYS = CPU_BG ;

I'm just thinking (again) these Atmel chips have something screwy wrong with them. I mean I got the Altera working on the STE at 32MHz with no trouble at all. 10 hours later with the Atmel, and can't even get stock 8MHz working :roll:

I am tempted to move to Altera, but that would mean another PCB design, and I don't have time to convert this design over to Altera. Plus the Altera IC is pretty expensive and at "end of life" .

I will see if I can find a new PLD to try, and I will contact atmel for help, but I think this project will just have to be abandoned after today. :roll:
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

https://www.exxoshost.co.uk/atari/ All my hardware guides - mods - games - STOS
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Thu Sep 07, 2017 4:37 pm

I looked into what the 1K resistor was doing with the signals..

NO RESISTOR
1-min.png
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WITH RESISTOR
2-min.png
2-min.png (26.75 KiB) Viewed 995 times
All I can really see is the DC OFFSET moving up by about 0.25V. The undershoot seems to "stop" at the 0v line, whereas before it got to about -0.5V.

This makes me think towards "latch up" of FET inputs. -0.5V could be enough for internal latch up, however I would have thought the 8MHz output would have died if that was the case.

The datasheet doesn't mention anything relating to latch up :roll: Though I am guessing its possible it could screw up the internal logic somehow and cause a glitch in the 8mhz clock which I am not seeing.

I did see this mentioned in one ATF1500 sheet..
3.jpg
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So about 0.6V is considered "safe" with -2.0V for under 20ns, I have about 5ns at 0.5V so should be good, but not convinced..

Also this sheet does state...
4.jpg
4.jpg (9.32 KiB) Viewed 993 times
-0.5V input voltage.

Of course I only saw -0.5V undershoot in that one capture, I have also now seen 0.64V undershoot. This is very suspect considering the system seems to work with the 1K pull up which would turn -0.64V into -0.39V which is within specs...

When I connect a second scope probe, the undershoot reduces a lot also. As I found before the scope probe seems to allow the machine to boot up....
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

https://www.exxoshost.co.uk/atari/ All my hardware guides - mods - games - STOS
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by rpineau » Thu Sep 07, 2017 4:53 pm

yea not much difference.
Are you always driving BG ? or is it going Z when not asserted by the CPU ?
We had issues with the Atmel on the first 68020 card :

DSACK0 = 'b'1;
DSACK0.oe = 'b'0; /* Always off */

You would think this would keep the pin in high impedance state ... well it didn't !!!!!!!
That's pretty much when we decided to switch to Xilynx.
So look fir things like that where a signal is not being used in anything but you want to keep it in highZ.
Rodolphe

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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Thu Sep 07, 2017 5:08 pm

rpineau wrote:
Thu Sep 07, 2017 4:53 pm
yea not much difference.
Are you always driving BG ? or is it going Z when not asserted by the CPU ?
We had issues with the Atmel on the first 68020 card :

DSACK0 = 'b'1;
DSACK0.oe = 'b'0; /* Always off */

You would think this would keep the pin in high impedance state ... well it didn't !!!!!!!
That's pretty much when we decided to switch to Xilynx.
So look fir things like that where a signal is not being used in anything but you want to keep it in highZ.
Rodolphe

I'm actually doing this...

CPU_DTACK = ST_DTACK ;
CPU_DTACK.OE = ST_BGACK;

ST_AS = CPU_AS ;
ST_AS.OE = ST_BGACK ;

BG_SYS = CPU_BG ;
BG_SYS.OE = ST_BGACK ;

Though as I can boot up fine now with a 1K resistor or scope probe on the 8mhz clock, I think the Atmel is malfunctioning when it sees to much undershoot.
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

https://www.exxoshost.co.uk/atari/ All my hardware guides - mods - games - STOS
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Thu Sep 07, 2017 5:55 pm

So I now tried 2 anti-parallel diodes in series with the PLD input, and its now working fine again. This really makes me wonder what other signals are causing the PLD to go screwy during other tests :roll:
25.JPG
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TOS104 & TOS206 now working. TOS206 reported some RAM faults, though with the scope probe on the PLD input, it passed fine.
st.jpg
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Here are new captures ,

WITHOUT DIODE
1-min.png
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WITH DIODES
2-min.png
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I see about 0.5V DC offset there.

I also have been wondering about the 2V area on the rise, seems to glitch a tiny bit also..

I think probably will have to add a schmitt buffer there to clean up the 8MHz clock input :roll:
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

https://www.exxoshost.co.uk/atari/ All my hardware guides - mods - games - STOS
https://www.exxoshost.co.uk/atari/last/storenew/ - All my hardware mods for sale - Please help support by making a purchase.

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