V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Help & information about the V2.5 booster.
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rpineau
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by rpineau » Mon Jan 29, 2018 10:25 pm

I have seen some 6850P run slightly above 1MHz but for 1.6MHz and up you'll definitely need a B version.
And then there is the case of going above 2MHz (aka CPU running at more than 20MHz). Same as for 1.3MHz on the P version where you might be able to go slightly above 2MHz, but anything above this and you need to regenerate the E clock and redo the VMA/VPA/E circuit outside the CPU and resync these with the CPU.
As exxos said, using the SEC cpu has the advantage that you don't have these pins on it so you have to regenerate these the same way you do for a 68020 (and up). So you can generate all of this from the 8MHz clock. If you use a 6850B, you could generate the E clock as 1.6MHz and make the ACIA access slightly faster.

Rodolphe

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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Mon Jan 29, 2018 10:25 pm

troed wrote:
Mon Jan 29, 2018 10:16 pm
I just reacted to your comment above about 1.3MHz being too much for the original ACIAs and I'm running mine at 1.6. (6850P so not 68B50 which indeed are rated at 2MHz).
ah, don't know why I put 1.3 :shrug: Should have been 2.3MHz.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by rpineau » Mon Jan 29, 2018 10:30 pm

That's fine. 2.3MHz is probably the upper bound for these anyway.

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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Tue Jan 30, 2018 10:57 am

rpineau wrote:
Mon Jan 29, 2018 10:30 pm
That's fine. 2.3MHz is probably the upper bound for these anyway.
Yeah most likely. I may see if I can build SEC adapter for this dev-board.. see if I can do tests on my known working setup.. Likely have to run a few wires from CPU to PLD AVEC etc.. will look into it when I get chance :)
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Thu Feb 01, 2018 2:45 pm

Now that ASYNC is solved.. back to the SEC board...

PLL is gone, adding in a OSC instead.. having a bit of trouble squashing in the JTAG header without moving to 4 layers...

This is just a pure MHz booster to see what the top speed of the SEC CPU can do... A lot of work just for a test.. but I need to know if its worth moving to this CPU or not.. so only way to know is to build it and see...

sec1.JPG
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Thu Feb 01, 2018 6:56 pm

..Some time later...

Need to double check it yet... But *just* managed to get the CPU one side, and PLD on other.. on 2 layers to keep proto costs down..

sec2.JPG
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top.jpg
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bottom.jpg
bottom.jpg (32.18 KiB) Viewed 418 times
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by rpineau » Fri Feb 02, 2018 3:57 am

very nicely done !!
:bravo: :cheers:

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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Fri Feb 02, 2018 9:48 pm

PCBs on order :) just a matter of waiting now.. :ball:

I was thinking that while the CPU could overclocked really high, is also the issue of thermal problems with this plastic package.. So it is possible it could work at 64 MHz, but then running to thermal problems.. What I can tell 50MHz is to be the average.. Not really sure why.. Could just be the top limit of the CPU or a thermal limit..

Hopefully once this test is done, it will basically mark the end of the booster research, finally!! As RAM is the main bottleneck, then the next course of action is to speed up ST-RAM to 200% like troed has been working on lately.. If this can be incorporated into future booster designs, coupled with a maxed out CPU, then this would be the fastest 68000 system possible. At least with the current MMU limitations.

Of course at some point I will add fast-ram, so this could be running at 50MHz along with the CPU for example coupled with 200% ST-RAM speeds :twisted: of course I need to max out and finish the CPU acceleration work first.. Then I can concentrate on the RAM speeds etc.

It is also possible a 030 CPU could be adapted without too much work as the SEC CPU wires up almost the same as a 030 would. Of course the 030 brings caches for more speed and also 32bit access.

Though this kind of mixes in with what TerribleFire is trying to do as well. I may see if I can obtain one of his 030 boards as it is already wired up use with the STFM.. Just he is unable to get it working currently.. Though I am trying to help him get that project off the ground as there is no use in myself designing a 030 based booster if someone else has already designed it. Basically if I can add my own code into that design, then it will save myself a whole epic load of work as the hardware will basically be "off the shelf".
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by rpineau » Fri Feb 02, 2018 9:59 pm


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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS

Post by exxos » Fri Feb 02, 2018 10:09 pm

rpineau wrote:
Fri Feb 02, 2018 9:59 pm
viewtopic.php?f=3&t=555#p3623

.... 68030 ... ;)
Yeah I saw that :) not sure how far away you are from the STE version though as mostly MSTE at the moment ?
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