STE / MSTE 68020 booster
Posted: Mon Jan 15, 2018 9:30 pm
As some of you might now, me (Rodolphe) and Juliusz have been working on a 68020 card for MSTE and STE.
I started on my own and the first version only had the 68020 and a CPLD to do the signal adaptation and eventually run at 16MHz and 32MHz.
We got this working but the CPLD was not working as expected and we had a lot of issues with the CPLD dev tools.
After getting this version working we took the time to re-assess the CPLD situation and decided to use a different brand.
We're now using Xilinx XC9500XL series.
After this we designed a new version with the new CPLD (Xilinx XC95144XL) as well as 2 socket to put a 32bit TOS on it, an expansion port that used "normal" header instead of the expensive DIN41612 connector.
We got a few PCB made and assenbled 2 MSTE cards (which also works in Juliusz STE).
We got these working fairly quiclky and even got the 16MHz and then 32MHz working on these.
After that we also go the TOS to work in 32 bit. We also have the TOS working with the blitter (aka blitter accessing the TOS on the board in 2x16 bit transfer).
Of course we ran into countless issues with bus mastering (blitter/dma) and wai state, sync and what not.
We think we have it working well now and Juliusz think he solved the last few issue he had with the CosmosEx RPI communication (the SD card side has been working fine for a long time on my MSTE and his STE).
We also had a few PCB issues, bad board, track or via peeling off.. so all of this slowed us down (and life stuff got in the way too).
We are now starting to assemble version 3 for the board for this project. We once again changed the connector for something modern that doesn't take too much space (AMP 5-5179009-5 120 pin 0.8mm 2 rows).
We also put a bigger CPLD (XC95288XL TQFP144) to integrate an interrupt controller on the card for the expansion card. We plan on using the VHDL code from the MFP68901 from the Suska project and trim everything we don't need to only keep the 8 external interrupt pin. The advantage is that Atari coders already know how to use the MFP and it will be "wired" at the same address as the 2 MFP on the TT.
I don't yet have a proper picture of the new v3 board (STE or MSTE).
We will release all of this as open-source once the V3 are tested and working like the V2 and will update the VHDL code as we go for the interrupt controller.
We also looked at the STFM and Mega ST. I made a DIL to PLCC adapter so we can test the card in a MegaST and potentially in a STFM. We haven't had time to test this yet.
I'll try to update this post as we make progress.
Rodolphe
I started on my own and the first version only had the 68020 and a CPLD to do the signal adaptation and eventually run at 16MHz and 32MHz.
We got this working but the CPLD was not working as expected and we had a lot of issues with the CPLD dev tools.
After getting this version working we took the time to re-assess the CPLD situation and decided to use a different brand.
We're now using Xilinx XC9500XL series.
After this we designed a new version with the new CPLD (Xilinx XC95144XL) as well as 2 socket to put a 32bit TOS on it, an expansion port that used "normal" header instead of the expensive DIN41612 connector.
We got a few PCB made and assenbled 2 MSTE cards (which also works in Juliusz STE).
We got these working fairly quiclky and even got the 16MHz and then 32MHz working on these.
After that we also go the TOS to work in 32 bit. We also have the TOS working with the blitter (aka blitter accessing the TOS on the board in 2x16 bit transfer).
Of course we ran into countless issues with bus mastering (blitter/dma) and wai state, sync and what not.
We think we have it working well now and Juliusz think he solved the last few issue he had with the CosmosEx RPI communication (the SD card side has been working fine for a long time on my MSTE and his STE).
We also had a few PCB issues, bad board, track or via peeling off.. so all of this slowed us down (and life stuff got in the way too).
We are now starting to assemble version 3 for the board for this project. We once again changed the connector for something modern that doesn't take too much space (AMP 5-5179009-5 120 pin 0.8mm 2 rows).
We also put a bigger CPLD (XC95288XL TQFP144) to integrate an interrupt controller on the card for the expansion card. We plan on using the VHDL code from the MFP68901 from the Suska project and trim everything we don't need to only keep the 8 external interrupt pin. The advantage is that Atari coders already know how to use the MFP and it will be "wired" at the same address as the 2 MFP on the TT.
I don't yet have a proper picture of the new v3 board (STE or MSTE).
We will release all of this as open-source once the V3 are tested and working like the V2 and will update the VHDL code as we go for the interrupt controller.
We also looked at the STFM and Mega ST. I made a DIL to PLCC adapter so we can test the card in a MegaST and potentially in a STFM. We haven't had time to test this yet.
I'll try to update this post as we make progress.
Rodolphe