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Re: DFB1r3 dev board demonstration video
Posted: Fri May 21, 2021 3:55 pm
by JezC
Re: DFB1r3 dev board demonstration video
Posted: Fri May 21, 2021 5:33 pm
by Badwolf
By the way, I mentioned in the video that I was experimenting with adding an FPU to the board. It doesn't work for me, alas.
It's recognised and under TOS the FRAC.DSP program will draw its Mandelbrot, but GB6 will crash. Under EmuTOS it's an exception on both.
I've a suspicion I've pushed my particular brand of firmware about as far as I can. I'm getting some odd fitting errors and any little tweak seems to break timing now despite vast swathes of macrocells being available. More work is needed there & therefore timing may be the problem.
In terms of wiring, I've:
- All 32 data lines connected
- DSACK[1:0] are connected direct and converted to open drain with 2k2 pullups
- A[4:1] connected to the address bus
- Clock, reset, RW, AS and DS bridged
- Chip Select being the only derived signal based on
Code: Select all
&FC & ( A[19:16] == 4'b0010 ); // co-processor decode
Sound about right?
BW
Re: DFB1r3 dev board demonstration video
Posted: Sat May 22, 2021 10:22 am
by exxos
Badwolf wrote: ↑Fri May 21, 2021 5:33 pm
- Chip Select being the only derived signal based on
Code: Select all
&FC & ( A[19:16] == 4'b0010 ); // co-processor decode
TF536 has
Code: Select all
wire FPUOP = CPUSPACE & ({A[19:16]} === {4'b0010});
So looks right to me
Re: DFB1r3 dev board demonstration video
Posted: Sun May 23, 2021 8:14 am
by Reylan
Hello,
I was wondering if it would be possible to stack the dfb1 on top is a ct60e.
To give a fully compatible and fast 68030 and a 68060.
Just to know
Re: DFB1r3 dev board demonstration video
Posted: Tue Jun 01, 2021 4:25 pm
by Badwolf
Reylan wrote: ↑Sun May 23, 2021 8:14 am
Hello,
I was wondering if it would be possible to stack the dfb1 on top is a ct60e.
To give a fully compatible and fast 68030 and a 68060.
Just to know
Haha, I doubt it!
BW
Re: DFB1r3 dev board demonstration video
Posted: Tue Jun 01, 2021 4:26 pm
by Badwolf
exxos wrote: ↑Sat May 22, 2021 10:22 am
TF536 has
Code: Select all
wire FPUOP = CPUSPACE & ({A[19:16]} === {4'b0010});
So looks right to me
Cheers.
Been away for a week so will likely come back to this later this week. Suspecting possibly dodgy fly-leads, TBH.
BW
Re: DFB1r3 dev board demonstration video
Posted: Tue Jun 15, 2021 11:03 am
by MegaSTEarian
Any update on this wonderful project?
Re: DFB1r3 dev board demonstration video
Posted: Wed Jun 16, 2021 11:52 am
by Badwolf
Yeah, sorry, not a lot for a number of reasons.
- I've been a way for a bit.
- I've been experimenting with other things.
- Cricket season has started so my weekends aren't as available.
- The FPU hat didn't work 'out of the box' and I hit a dead-end firmware-wise trying to make it so.
I've started work on rebuilding the firmware as it's *really* inefficient at the moment. I thought about porting the TF330 source as a starter but it doesn't really have much in common with the Falcon's architecture so would likely end up being mostly my code. The TF536 is closer, but it's not open. I might try a bastardised combination TF534 and TF330 and see where I get.
Basically I want a new, more efficient, more reliable firmware before I move back the FPU and rev4.
Cheers for chasing me up, though.
BW
Re: DFB1r3 dev board demonstration video
Posted: Fri Jun 18, 2021 12:00 pm
by MegaSTEarian
Cheers, thanks for the update.
