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Re: BLITTER RE-CREATION THOUGHTS

Posted: Thu Nov 14, 2019 10:07 pm
by Icky
We have some progress. With help from slingshot and his files we have got the FPGA Blitter running at the fastest we have seen so far.

BUT we still have corruption. The Blitter is clocked at 16MHz so the numbers are high. I have to turn the Blitter on in GB6 run the test and then turn it off and do a window operation such as running another test to remove the corruption to see the results.

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Re: BLITTER RE-CREATION THOUGHTS

Posted: Thu Nov 14, 2019 10:16 pm
by exxos
Probably about 75% full speed then. Kinda looks like its skipping alternative bus accesses going by the missing letters in the text.

I guess I should do a patch to GB6 to refresh the screen by keypress :lol:

Re: BLITTER RE-CREATION THOUGHTS

Posted: Thu Nov 14, 2019 11:23 pm
by Icky
Just tried an updated ctrl file from slingshot and now we have matched 100% against an STE GB benchmark and 556% against the STFM benchmark.

So with one file change we have gone from 372% to 565% BUT we still have corruption so that needs sorting.


STE Benchmark
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STFM Benchmark
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Corruption during Blitting test.
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Re: BLITTER RE-CREATION THOUGHTS

Posted: Fri Nov 29, 2019 1:47 pm
by Icky
An update on this thread. We haven't had time to continue working on this as the H4 has taken up Exxos' world and I am busy trying to finish off my build. I also have had other distractions with the Giant Panda 3D printer.

However these arrived today from the assembly company. Boards on the left are FPGA PLCC Buffer Boards (The Shock Absorber) that allow plugging into the ST where the MMU, GLUE or Blitter are and the FPGA boards, on the right, to plug into the top. They are essentially 5v <-> 3.3V buffers which will allow us to test out other cores of the individual chips on an ST board.

That said we need to get back on track with the Blitter core to get it working. May be we will have time over Christmas - famous last words :)

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Re: BLITTER RE-CREATION THOUGHTS

Posted: Fri Nov 29, 2019 1:59 pm
by exxos
@Icky :thumbup: Then we can do the "exxos DMA" version and really screw with people's minds :dualthumbup:

Re: BLITTER RE-CREATION THOUGHTS

Posted: Fri Nov 29, 2019 2:00 pm
by Cyprian
nice news

Re: BLITTER RE-CREATION THOUGHTS

Posted: Sat Apr 11, 2020 8:50 am
by Cyprian
just to let you know
@ijor has released his BLiTTER fpga code:

https://github.com/ijor/stBlitter

Re: BLITTER RE-CREATION THOUGHTS

Posted: Sat Apr 11, 2020 9:09 am
by Cyprian
and one more,
Atari 8bit has a nice and not so expensive FPGA board 40pin for soundchip recreation - currently POKEY, but PSG - YM2149 is planed.
viewtopic.php?f=44&t=2639

Re: BLITTER RE-CREATION THOUGHTS

Posted: Sat Apr 11, 2020 1:03 pm
by Icky
Cyprian wrote:
Sat Apr 11, 2020 8:50 am
just to let you know
@ijor has released his BLiTTER fpga code:

https://github.com/ijor/stBlitter
Thanks @Cyprian. As one of my many projects I have been looking at fitting Igor's code into the FPGA board to see how it works. I currently have it plumbed in but the ST is not booting currently :).

Unfortunately prioritywise its not top of my list this holiday break as I am re-wiring the Giant Panda wiring loom and then swinging back to the Flashy Clock V6 testing.

EDIT: and I keep getting distracted viewtopic.php?f=29&t=2636&start=30#p36237

Re: BLITTER RE-CREATION THOUGHTS

Posted: Sat Apr 11, 2020 1:26 pm
by exxos
Icky wrote:
Sat Apr 11, 2020 1:03 pm
EDIT: and I keep getting distracted viewtopic.php?f=29&t=2636&start=30#p36237
:chairsmack: