CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Information and news about the 68SEC000 64MHz booster.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos » Sun Nov 18, 2018 10:57 pm

I am also considering adding on some flash onto this. While there is no software for this currently, I can however wire this up pretty much in parallel to the SRAM, where I only need to route a couple of signals to the PLD for programming. The problem I see with this is the physical size, that it will be in the way of the keyboard support post which is to the right the CPU on the STFM.

Another issue that will occur is the ROM chip is now right above the MMU. This will likely mean it will be in the way of my plug-in 4MB RAM kit. We cannot really add things to this board without some consequences somewhere along the line.

Really this is being developed as a prototype for the STF remake. Will of course work in a STFM, physically fitting probably not so much. While I was doing this also as a upgrade from the V2.2 booster, it is also going to be a lot larger because of the SRAM. If I did a version without the SRAM, then it would be a better solution in terms of a V2.2 booster upgrade. But of course doing 2 designs is twice the work.

I will try and avoid the keyboard post hole and get the flash rooted on this board so they can be used in the STFM more easily. But of course, writing software for this someone else will likely have to do this.. But of course worse cases the flash chips just do not get fitted onto this board. But at least the option is there if anyone wanted to take on that project.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by JezC » Sun Nov 18, 2018 11:15 pm

Which Flash chips are you thinking of fitting?

I've previously done a fair bit of work with AMD (now Spansion) devices, so I might be able to help a bit with that if you do fit them. :roll:

Just picked up another 1040STF (SM124 isn't working by the look of things) with 2x red LEDs - original (long button) floppy seems to work OK but has TOS 1.0 so that will probably need an upgrade at some point (as well as a PSU recap).
Will check the motherboard revision when I crack the case open but I suspect it will be the same as my first STF (which I bought in April 1987 IIRC with an SM125).

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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos » Sun Nov 18, 2018 11:26 pm

https://www.mouser.co.uk/ProductDetail/ ... xJG56nE%3d

Only really those as a option.. has to be 5V... no 16bit, so have to use 2 of those for 16bit. either TSOP or PLCC.... PLDD is cheaper.. I guess it depends which is easier to physically fit on the PCB.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos » Mon Nov 19, 2018 11:07 am

A quick measure on a STFM to the KB post hole (shown in white line on the right)... clearly the 2 flash chips should be able to fit on this board just fine!

Capture.JPG
Capture.JPG (206.45 KiB) Viewed 1026 times
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by PhilC » Mon Nov 19, 2018 11:14 am

Just out of interest, what about in a Mega and clearance for things like the expansion port etc.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos » Mon Nov 19, 2018 11:18 am

Forgottenmyname wrote:
Mon Nov 19, 2018 11:14 am
Just out of interest, what about in a Mega and clearance for things like the expansion port etc.
No clue. Don't plan in looking into it TBH. Assume it won't fit.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by PhilC » Mon Nov 19, 2018 11:30 am

Will let you know when I get my hands on one. Aren't the CPU sockets the other way round? So should clear it?
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos » Mon Nov 19, 2018 11:38 am

Forgottenmyname wrote:
Mon Nov 19, 2018 11:30 am
Aren't the CPU sockets the other way round?
I think so yes.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by exxos » Mon Nov 19, 2018 11:52 am

Looks like it routes reasonably well..

2.JPG
2.JPG (64.54 KiB) Viewed 1011 times

The next issue is what to do with the ROM select and bank select address lines..

Probably they will have to be a jumper select CE to the ROM or FLASH.

Jumpers would work for the flash as well, there will be 4 FLASH banks, so to address lines will need to be selected.

I think it is a little messy using jumpers as not all flash banks could be programmed in one go. It may have to stop like that for now until I can think of a better solution for it. I guess I could route the two address lines to the PLD, and also route the jumpers to the PLD, so that the PLD can bypass whatever jumper setting is set during programming. Then in effect all 4 flash banks can be programmed in one go.. I guess it is no hardship to change the jumpers during programming anyway.

EDIT:

I guess ultimately there will be no need for the PLCC ROM.. but until the flash rom stuff is tested and verified, its better to have the PLCC as at least it can allow me to test the booster while not having to worry about the flash stuff.
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Re: V2.5 BOOSTER CURRENT PROTOTYPE STATUS (SEC BOOSTER)

Post by PhilC » Mon Nov 19, 2018 11:57 am

Don't forget your dark glasses whilst programming those flash bangs :D
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