Post
by exxos » Thu Jan 25, 2018 10:44 pm
I have a WIP thought..
I know STE is really easy to build boosters.. it seems to not be fussy about anything..
I know the STFM can run double speed MMU & CPU without problems.. and I also know I can run 16MHz CPU constant without problems..
The problem is, something screws up on the STFM, preventing ASYNC operation (STE doesn't seem to care about this at all). So I was thinking it must be MMU related... as system can work at double speed easily.
As soon as the CPU goes ASYNC from the system clock it starts to fail. Now I think this might be relating to the interleaving of RAM and CPU cycles. The CPU has a "slot" to do anything it wants, really at any speed. Though even when not accessing the bus, it still screws up something.. which makes no sense..
A thought was it could just be slow bus isolation drivers LS244.. Because when system is in sync, the delays of the drivers doesn't really matter, since the CPU will not put /AS low for 100+ns... BUT, imagine now if the CPU has /AS low all the time, aka data constant on the bus.. then there will now be a conflict of data on the bus because of propagation delays of bus isolation. This may only be 20ns, but condition can be there where CPU has control of the bus at the same time the MMU is starting a RAM cycle.. basically CPU & RAM bus shorted out via LS244...
There will be delays in MMU logic also.. but problem will get worse the faster the CPU goes, and the more it goes out of sync, more chance of bus conflict. Of course with using system clock, this "fault" is never seen, as CPU will take much longer to put data on bus than propagation delay of LS244 buffers. But even 8MHz ASYNC would likely easily "drift" into same problem.
Also, STE is re-design of ST circuit (but still very similar) , fully integrated MMU/GLUE logic, so problem is likely still there, but delays much less.. so STE can operate easily with ASYNC because logic isn't as "slow" as STFM.
It is also possible 38MHz CPU on the STE, might not actually be the top speed of the CPU, but the speed which is needed to run into bus isolation faults again.
So if I get time tomorrow, I am going to see if I can work out delays through MMU and isolation delays. I will also order some F244 and see if these improve the stability....