TF536 + 68000 relocator and ROM board project.

[Badwolf]

OK, it's fixed the low performing 68000, so it was obviously the Power/GND noise which was causing the CPU to miss clock cycles.
IMG_2106.jpg

I've just sat down and read this mammoth thread all the way through as it looked interesting. Great last post to get to!

Well done, Stephen.

I'm not sure I've understood how you're switching the CPUs, though. It doesn't look enough chips to be completely isolating all pins. Are you holding BGK or similar?

Cheers,

BW.

[PhilC]

Hopefully your TF536 will arrive soon and we can see how it all assembles and performs. I think there may he a few interested parties on here now youve sorted out the power problems

[stephen_usher]

OK, it's fixed the low performing 68000, so it was obviously the Power/GND noise which was causing the CPU to miss clock cycles.
IMG_2106.jpg

I've just sat down and read this mammoth thread all the way through as it looked interesting. Great last post to get to!

Well done, Stephen.

I'm not sure I've understood how you're switching the CPUs, though. It doesn't look enough chips to be completely isolating all pins. Are you holding BGK or similar?

Cheers,

BW.

I'm mostly using @derkom's design. It's switching the bus arbitration and some outputs. I've added controlling the /HALT line. The CPU which isn't in use has the /HALT line pulled low so that it's constantly halted and has all the address and data lines in tristate so that they don't load the buses.

[stephen_usher]

Hopefully your TF536 will arrive soon and we can see how it all assembles and performs. I think there may he a few interested parties on here now youve sorted out the power problems

Derkom may be interested in the lack of the CPU slow down that he has with his relocator for the Stacy. I'm guessing his problems are power/ground noice related.

[JezC]

I think there may he a few interested parties on here now youve sorted out the power problems

Yes, I would expect lots of interest in any board offering a 100% compatible option alongside the massive boost of a TF536... including me!

Very good news with this latest version, well done!

[agranlund]

Yeah this is really interesting, I too would like the ability to use the stock 68000 with the flick of a switch

[stephen_usher]

Well, if people are interested, here is a complete archive of KiCad files, Gerbers and GAL source and JED files.

[Badwolf]

I'm mostly using @derkom's design. It's switching the bus arbitration and some outputs. I've added controlling the /HALT line. The CPU which isn't in use has the /HALT line pulled low so that it's constantly halted and has all the address and data lines in tristate so that they don't load the buses.

Ah ok, I’m not familiar with Derkom’s design, but it sounds like that’s doing the right thing if you’ve added HALT to it.

HALT by itself, at least on the 60830 which I know you half on half of your board, doesn’t tristate the lines, it just ‘stops activity’. The data lines, for example, are still asserted. This caused me problems on my Falcon card when I failed to understand this. Both CPUs fight.

Holding BGK is the simplest way to tristate the pins, but negotiating is obviously superior.

Just thought I’d mention it in case one or both your chips are running hot.

BW.

[stephen_usher]

According to Motorola, asserting /HALT on the 68000 makes the address and data lines go high impedance, i.e. they stop being connected to the pins electrically in effect.

Seeing as both sockets are for a 68000 compatible processor any interface logic between the socket and accelerated processor would need to follow the 68000 on the machine side of the interface.

[stephen_usher]

OK, this board is rock solid. Even the most finiky of my 68000s works flawlessly in the "Accelerator" socket. GB6 reports 100% for all tests. And most importantly... the TURBO LED works correctly.

I'll have to wait for the TF to retrun before I can test any acceleration. However, I can test if the ROM in 512K mode works fully by writing a 512K EmuTOS ROM over the weekend.