REV 3 - REV 5 - The beginning (ST536)

[exxos]

@Badwolf

slight tweak..

Code: Select all

assign BERR = CPCS_INT & altrambuserr ? 1'bz : 1'b0;

EMUTOS says 64MB now

So at least that problem is figured out... Just need to figure out this odd dram corruption issue next

[Badwolf]

@Badwolf

slight tweak..

Code: Select all

assign BERR = CPCS_INT & altrambuserr ? 1'bz : 1'b0;

EMUTOS says 64MB now

So at least that problem is figured out... Just need to figure out this odd dram corruption issue next

Top.

My money's on an errant bit of address decode logic. Double check the ROM and AltRAM logic, plus anything else (bar bus error which we've now sorted) that makes decisions based on the address bus.

Anything encompassing lines 23:20 for particular attention.

BW

[czietz]

@Badwolf
slight tweak..

Code: Select all

assign BERR = CPCS_INT & altrambuserr ? 1'bz : 1'b0;

EMUTOS says 64MB now
So at least that problem is figured out... Just need to figure out this odd dram corruption issue next

Note that -- as already stated on the list -- it is not required to have a bus error (though it certainly helps as you found out). If EmuTOS detected more than 64 MB of Alt-RAM before, there must have been memory that was writeable and readable above the 64 MB mark. For example, some TT-RAM cards for the TT don't generate a bus error, either, and they are still correctly sized by EmuTOS.

EDIT: I just replied to your Sysinfo screenshot on the EmuTOS list: "These are the exception vectors located at the beginning of ST-RAM! This is *exactly* what I suspected: ST-RAM is mirrored at 0x5000000 and, thus, detected as additional "alt-RAM". This is without a doubt a bug in the address decoding on the TF card."

My money's on an errant bit of address decode logic.

Isn't there IDE on the TF? Maybe addresses 0x1F00000 etc. are wrongly decoded to IDE...

[exxos]

I'm just doing a loop to output "bad" addresses..

Code: Select all

 error     55    238   $F00000   %111100000000000000000000
 error     55    238   $F00400   %111100000000010000000000
 error     55    238   $F00800   %111100000000100000000000
 error     55    238   $F00C00   %111100000000110000000000
 error     55    238   $F01000   %111100000001000000000000
 error     55    238   $F01400   %111100000001010000000000
 error     55    238   $F01800   %111100000001100000000000
 error     55    238   $F01C00   %111100000001110000000000
 error     55    238   $F02000   %111100000010000000000000
 error     55    238   $F02400   %111100000010010000000000
 error     55    238   $F02800   %111100000010100000000000
 error     55    238   $F02C00   %111100000010110000000000
 error     55    238   $F03000   %111100000011000000000000
 error     55    238   $F03400   %111100000011010000000000
 error     55    238   $F03800   %111100000011100000000000
 error     55    238   $F03C00   %111100000011110000000000
 error     55    238   $F04000   %111100000100000000000000
 error     55    238   $F04400   %111100000100010000000000
 error     55    238   $F04800   %111100000100100000000000
 error     55    238   $F04C00   %111100000100110000000000
 error     55    238   $F05000   %111100000101000000000000
 error     55    238   $F05400   %111100000101010000000000
 error     55    238   $F05800   %111100000101100000000000
 error     55    238   $F05C00   %111100000101110000000000
 error     55    238   $F06000   %111100000110000000000000
 error     55    238   $F06400   %111100000110010000000000
 error     55    238   $F06800   %111100000110100000000000
 error     55    238   $F06C00   %111100000110110000000000
 error     55    238   $F07000   %111100000111000000000000
 error     55    238   $F07400   %111100000111010000000000
 error     55    238   $F07800   %111100000111100000000000
 error     55    238   $F07C00   %111100000111110000000000
 error     55    238   $F08000   %111100001000000000000000
 error     55    238   $F08400   %111100001000010000000000
 error     55    238   $F08800   %111100001000100000000000
 error     55    238   $F08C00   %111100001000110000000000
 error     55    238   $F09000   %111100001001000000000000
 error     55    238   $F09400   %111100001001010000000000
 error     55    238   $F09800   %111100001001100000000000
 error     55    238   $F09C00   %111100001001110000000000
 error     55    238   $F0A000   %111100001010000000000000
 error     55    238   $F0A400   %111100001010010000000000
 error     55    238   $F0A800   %111100001010100000000000
 error     55    238   $F0AC00   %111100001010110000000000
 error     55    238   $F0B000   %111100001011000000000000
 error     55    238   $F0B400   %111100001011010000000000
 error     55    238   $F0B800   %111100001011100000000000
 error     55    238   $F0BC00   %111100001011110000000000
 error     55    238   $F0C000   %111100001100000000000000
 error     55    238   $F0C400   %111100001100010000000000
 error     55    238   $F0C800   %111100001100100000000000
 error     55    238   $F0CC00   %111100001100110000000000
 error     55    238   $F0D000   %111100001101000000000000
 error     55    238   $F0D400   %111100001101010000000000
 error     55    238   $F0D800   %111100001101100000000000
 error     55    238   $F0DC00   %111100001101110000000000
 error     55    238   $F0E000   %111100001110000000000000
 error     55    238   $F0E400   %111100001110010000000000
 error     55    238   $F0E800   %111100001110100000000000
 error     55    238   $F0EC00   %111100001110110000000000
 error     55    238   $F0F000   %111100001111000000000000
 error     55    238   $F0F400   %111100001111010000000000
 error     55    238   $F0F800   %111100001111100000000000
 error     55    238   $F0FC00   %111100001111110000000000
 error     55    238   $1F00000   %1111100000000000000000000
 error     55    238   $1F00400   %1111100000000010000000000
 error     55    238   $1F00800   %1111100000000100000000000
 error     55    238   $1F00C00   %1111100000000110000000000
 error     55    238   $1F01000   %1111100000001000000000000
 error     55    238   $1F01400   %1111100000001010000000000
 error     55    238   $1F01800   %1111100000001100000000000
 error     55    238   $1F01C00   %1111100000001110000000000
 error     55    238   $1F02000   %1111100000010000000000000
 error     55    238   $1F02400   %1111100000010010000000000
 error     55    238   $1F02800   %1111100000010100000000000
 error     55    238   $1F02C00   %1111100000010110000000000
 error     55    238   $1F03000   %1111100000011000000000000
 error     55    238   $1F03400   %1111100000011010000000000
 error     55    238   $1F03800   %1111100000011100000000000
 error     55    238   $1F03C00   %1111100000011110000000000
 error     55    238   $1F04000   %1111100000100000000000000
 error     55    238   $1F04400   %1111100000100010000000000
 error     55    238   $1F04800   %1111100000100100000000000
 error     55    238   $1F04C00   %1111100000100110000000000
 error     55    238   $1F05000   %1111100000101000000000000
 error     55    238   $1F05400   %1111100000101010000000000
 error     55    238   $1F05800   %1111100000101100000000000
 error     55    238   $1F05C00   %1111100000101110000000000
 error     55    238   $1F06000   %1111100000110000000000000
 error     55    238   $1F06400   %1111100000110010000000000
 error     55    238   $1F06800   %1111100000110100000000000
 error     55    238   $1F06C00   %1111100000110110000000000
 error     55    238   $1F07000   %1111100000111000000000000
 error     55    238   $1F07400   %1111100000111010000000000
 error     55    238   $1F07800   %1111100000111100000000000
 error     55    238   $1F07C00   %1111100000111110000000000
 error     55    238   $1F08000   %1111100001000000000000000
 error     55    238   $1F08400   %1111100001000010000000000
 error     55    238   $1F08800   %1111100001000100000000000
 error     55    238   $1F08C00   %1111100001000110000000000
 error     55    238   $1F09000   %1111100001001000000000000
 error     55    238   $1F09400   %1111100001001010000000000
 error     55    238   $1F09800   %1111100001001100000000000
 error     55    238   $1F09C00   %1111100001001110000000000
 error     55    238   $1F0A000   %1111100001010000000000000
 error     55    238   $1F0A400   %1111100001010010000000000
 error     55    238   $1F0A800   %1111100001010100000000000
 error     55    238   $1F0AC00   %1111100001010110000000000
 error     55    238   $1F0B000   %1111100001011000000000000
 error     55    238   $1F0B400   %1111100001011010000000000

Will do a more in-depth run but it will take a lot longer...

[exxos]

Isn't there IDE on the TF? Maybe addresses 0x1F00000 etc. are wrongly decoded to IDE...

hmmm yep.. I had a lot of trouble trying to figure out the decoding syntax, eventually I got a line to work.. (but IDE interface isn't yet finished either)

@Badwolf ??

Code: Select all

wire ide_access  = ({A[23:16]} != {8'hF0});

Might just rip out the module just to rule it out..

[czietz]

Code: Select all

wire ide_access  = ({A[23:16]} != {8'hF0});

Well, that's of course problematic, as it matches all addresses that follow the pattern 0x??F0????, including alt-RAM addresses 0x01F00000, 0x02F00000, and others.

[Badwolf]

Isn't there IDE on the TF? Maybe addresses 0x1F00000 etc. are wrongly decoded to IDE...

Code: Select all

wire ide_access  = ({A[23:16]} != {8'hF0});

Well there's your problem. It doesn't take into account anything in the altram address range. Great shout, @czietz!

I suspect in the original firmware this is disregarded if altram is flagged, but perhaps not here.

Again, should be an easy enough fix:-

Code: Select all

wire ide_access  =  A[27:16] != 12'h0F0;

How about that (just adds the next four lines up and enforces them to be 0 -- ie, below TTRAM space)?

BW

[exxos]

Again, should be an easy enough fix:-

Code: Select all

wire ide_access  =  A[27:16] != 12'h0F0;

Right, so that came from the TF520.. It was the only line I could get to work to find IDE, but I think the 520 may have only had 4MB of RAM. or none.. can't remember..

Though should that be using up to A29 @Badwolf ?

[exxos]

I disabled the IDE..

IMG_6458.JPG (287.2 KiB) Viewed 3355 times

I think I been that hellbent on thinking there is a RAM timing problem, Or some timing problem relating to ROM, I did not actually consider the IDE decoding, I had actually forgotten all about it

So thanks @czietz & @Badwolf

[Badwolf]

Code: Select all

wire ide_access  =  A[27:16] != 12'h0F0;

Right, so that came from the TF520.. It was the only line I could get to work to find IDE, but I think the 520 may have only had 4MB of RAM. or none.. can't remember..

Though should that be using up to A29 @Badwolf ?

A29 will only come into play if you get up to 512MB RAM. A26 is technically enough, but by using A27 it's a nice three-hex-digit number.

*That said* it is decoding the whole of the x0F0xxxx range when only the first 40 bytes are technically needed, I believe, but I think this is safe and relatively low overhead logic-wise.

BW