20ns is 1 50mhz clock so it should be fine!!
You're breaking the golden rule... if it works don't f*ck with it.
20ns is 1 50mhz clock so it should be fine!!
It doesn't work faster when it should, that's the point, I want to know whyterriblefire wrote: ↑Fri Apr 09, 2021 12:18 pm 20ns is 1 50mhz clock so it should be fine!!
You're breaking the golden rule... if it works don't f*ck with it.
The 030s dont work any faster than that... they cant latch before S4.. some wont latch reliably until S5/S6. Seems to be mask dependant.exxos wrote: ↑Fri Apr 09, 2021 12:37 pmIt doesn't work faster when it should, that's the point, I want to know whyterriblefire wrote: ↑Fri Apr 09, 2021 12:18 pm 20ns is 1 50mhz clock so it should be fine!!
You're breaking the golden rule... if it works don't f*ck with it.
55ns ROM access time, + 20ns buffers to catch up... 50MHz CPU access is a lot slower than the STE booster running at 8/32Mhz.
Plus 20+ns for the ROM to disable.. that's a lot of time... Faster buffers I can turn the ROM off faster. As LTT Say, it is leaving performance on the table
Maybe so, but I am doing it anywayterriblefire wrote: ↑Fri Apr 09, 2021 12:55 pm The 030s dont work any faster than that... they cant latch before S4.. some wont latch reliably until S5/S6. Seems to be mask dependant.
Ok but be warned some 030s wont work at all if you do. :/exxos wrote: ↑Fri Apr 09, 2021 1:03 pmMaybe so, but I am doing it anywayterriblefire wrote: ↑Fri Apr 09, 2021 12:55 pm The 030s dont work any faster than that... they cant latch before S4.. some wont latch reliably until S5/S6. Seems to be mask dependant.
I had to set mine to 16MB as there are faults somewhere.
+16MB should mean bus error at 0x02000000. Easy to test with YAARTTT.
Code: Select all
wire altramberr = AS30 | ( A[25:24] != 2'b10 ); // 16MB; low is asserted; OR me with the BERR pin