REV 3 - The beginning

All about the TF536 port to the ST.
Badwolf
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Re: REV 3 - The beginning

Post by Badwolf » Mon Apr 05, 2021 3:31 pm

Badwolf wrote:
Mon Apr 05, 2021 3:28 pm
But that assumes there are 32 pull-ups on the 536...
BW
Actually, another question: how many data lines are actually routed to the CPLD?!

BW

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Re: REV 3 - The beginning

Post by exxos » Mon Apr 05, 2021 3:46 pm

Badwolf wrote:
Mon Apr 05, 2021 3:31 pm
Actually, another question: how many data lines are actually routed to the CPLD?!
ah only the 16bit ST bus, but thats the upper word of the 030.. But like you say, if something drives the bus high (really it shouldn't be) then it would break the method anyway.
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Re: REV 3 - The beginning

Post by Badwolf » Mon Apr 05, 2021 3:54 pm

exxos wrote:
Mon Apr 05, 2021 3:46 pm
Badwolf wrote:
Mon Apr 05, 2021 3:31 pm
Actually, another question: how many data lines are actually routed to the CPLD?!
ah only the 16bit ST bus, but thats the upper word of the 030.. But like you say, if something drives the bus high (really it shouldn't be) then it would break the method anyway.
Honestly, I'd just wait for the next 8MHz edge or something.

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Re: REV 3 - The beginning

Post by exxos » Tue Apr 06, 2021 9:36 am

I think me and these xilinx chips are going to be falling out very soon :roll:


ST DTACK Yellow
ST AS Blue

Address strobe seems to be even driven high or tri-stated in the code when something is accessing the bus..But it is oscillating like hell and the rise time is extremely slow.. But it does not do this always because the cycle before looks perfect.. I even added a extra 1K pull-up onto it and it made no difference.. In other places the oscillation seem to seriously corrupt AS .. and bizarrely this only seems to happen when the TTRAM is accessed.

IMG_6380.JPG
IMG_6380.JPG (238.67 KiB) Viewed 167 times

But more bonkers things going on, address strobe is high and DTACK is clearly pulsing when there is no possible way it could even do that.. unless I am missing something ?! there is no blitter or anything else on this machine I don't see how DTACK Is being driven. The PLD only has DTACK as an input, so I cannot see how the chip can even be driving that as a output unless the compiler is seriously screwing up somehow. I did have a span of the software ringing of a blank page for the design summary, intermittently not seeing the PLD, and after a while it would not even let me copy and paste in the thing.. I think the more you use it the more it starts screwing up.

IMG_6374.JPG
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It seems the VDI locking up problem came back when I moved the ROM from the motherboard to the TF536.. and absolutely nothing else has even changed. It otherwise seems to work perfectly fine as long as the TTRAM doesn't get accessed.
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Re: REV 3 - The beginning

Post by exxos » Tue Apr 06, 2021 9:55 am

This is another bonkers one as well..

ST_AS is not staying high, and yet it is being clocked high continuously via a 100MHz FF... How the hell can it be glitching like that :roll:

IMG_6382.JPG
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EDIT:

Dropped to schematics view and that is about as minimalist design can really expect. The highlighted line on the left is basically AS30... Which outputs to AS...

Capture.PNG
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Re: REV 3 - The beginning

Post by exxos » Tue Apr 06, 2021 10:45 am

If I run all the conditions through the master clock it does improve things greatly, but if I use a slower clock then does not boot up :roll:

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Re: REV 3 - The beginning

Post by Badwolf » Tue Apr 06, 2021 11:45 am

exxos wrote:
Tue Apr 06, 2021 9:36 am

Image

But more bonkers things going on, address strobe is high and DTACK is clearly pulsing when there is no possible way it could even do that.. unless I am missing something ?! there is no blitter or anything else on this machine I don't see how DTACK Is being driven. The PLD only has DTACK as a input, so I cannot see how the chip can even be driving that as a output unless the compiler is seriously screwing up somehow. I did have a span of the software ringing of a blank page for the design summary, intermittently not seen the PLD, and after a while it would not even let me copy and paste in the thing.. I think the more you use it the more it starts screwing up.
Is blue still ST-AS there? Why's it pulsing in between what appear to be normal bus accesses?

To me that looks like blue is actually 030 AS and this is behaving perfectly normally with a load of 50MHz accesses (causing no DTACK) and then the occasional ST-RAM access (blue goes low followed ~250ns later by yellow both then terminate at the same time).

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Re: REV 3 - The beginning

Post by exxos » Tue Apr 06, 2021 11:55 am

Badwolf wrote:
Tue Apr 06, 2021 11:45 am
Is blue still ST-AS there? Why's it pulsing in between what appear to be normal bus accesses?

To me that looks like blue is actually 030 AS and this is behaving perfectly normally with a load of 50MHz accesses (causing no DTACK) and then the occasional ST-RAM access (blue goes low followed ~250ns later by yellow both then terminate at the same time).
Both scope probes are on the 68K socket.. Because the code wasn't isolating ST_AS from AS30.. It is actually both ST_AS and AS30..


But like in this image when I disable it from seeing TTRAM and TOS..

IMG_6383.JPG
IMG_6383.JPG (249.34 KiB) Viewed 128 times

There is still something glitching somewhere...

But I think that is the least of my problems currently, because one moment everything works fine, I restart and it locks up loading the ROM in TOS... I was thinking my code changes were causing this problem, but it is intermittent, so I just have no idea why that is happening.
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Re: REV 3 - The beginning

Post by terriblefire » Tue Apr 06, 2021 1:29 pm

do you have a simple simulation of the code? I usually find the problem when i do that
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Re: REV 3 - The beginning

Post by exxos » Tue Apr 06, 2021 1:32 pm

terriblefire wrote:
Tue Apr 06, 2021 1:29 pm
do you have a simple simulation of the code? I usually find the problem when i do that
Wouldn't know how to do one even. Anything I can see a little odd is ST_DTACK does not always register as a high just before it locks up.. But it should not really affect anything anyway.
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