Project: HDMI/DVI out for STFM

Progress on our FPGA cores.
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exxos
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Project: HDMI/DVI out for STFM

Post by exxos »

oooo looking nice :bravo:
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Icky
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Project: HDMI/DVI out for STFM

Post by Icky »

:coolpics:

Looking nice Smonson.

Keep up the good work as I know it's difficult fitting all this development work around our lives and day jobs. Nice to see the evolution as well.

I see you are now on V6 and looking nice from its original inception. These things take time to develop and get right as a final production version ready for consumption by the masses.

Think this will be a nice addition to the H4 :)
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Project: HDMI/DVI out for STFM

Post by PhilC »

Sign me up already
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Darklord
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Project: HDMI/DVI out for STFM

Post by Darklord »

Hmm, so when you say "FM" does that mean it has to be ST models with a modulator?

I'm thinking about my STacy, of course. :)
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Icky
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Project: HDMI/DVI out for STFM

Post by Icky »

Darklord wrote: Tue Nov 19, 2019 11:28 pm Hmm, so when you say "FM" does that mean it has to be ST models with a modulator?

I'm thinking about my STacy, of course. :)
This works with STF as well as STFM.
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Smonson
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Project: HDMI/DVI out for STFM

Post by Smonson »

It might be a bit power-hungry for the Stacy, it draws about 250-300mA. At the end of the day though, you just need a standard ST shifter.
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Project: HDMI/DVI out for STFM

Post by Smonson »

There's something seriously wrong with the new v6 board, and I can't figure out what the problem is. The MAX3814 HDMI interface IC gets really hot, really fast - and the whole thing uses an extra 150mA or so over the previous one. So I've redone the artwork so that the MAX3814 is connected more like how it was in v5 with a ground plane under it and no vias in the signal paths or near the HDMI connector, plus I've added back-termination resistors and another bypass cap (I had 2, the datasheet recommends 3). I also moved all the bypass capacitors to the back of the board - first time I've ever done that. I hope that cleaning up noise and power/ground stuff might help - after all, this thing is running at 320MHz.

So, sorry about the lack of good news, but it's going to need another spin through the process.
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Post by exxos »

Oh no :( Anything I can do to help ?

But yeah, if you only change the PCB layout, then at high speeds its enough. I've had 2 volts oscillations between GND pins on the CPU and thats like 1cm long track! Normally there's a recommended PCB layout for the chips in the datasheets. I always use a GND & VCC plane now. Slap some ceramics as close to the devices power pins as possible. Any slight angles in tracks will aggravate oscillations. Via's are not a good idea for high speed stuff. Its one reason I spent so long trying to keep via's to a minimum on the H4 board, or if they have to be used, on shorter length traces only / lower speed signals.
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viewtopic.php?f=17&t=1585 Have you done the Mandatory Fixes ?
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Post by Smonson »

The PCB layout is really all I changed in this revision of the board, although I also moved some of the FPGA pins around for routing reasons. I removed the ground plane for a stupid reason - I was reading a recommended layout plan for the HDMI connector and it proposed removing the ground plane from under the connector. I extrapolated that to the MAX3814. I thought it might have something to do with capacitance between the tracks and a nearby ground at higher speeds (HDMI can go up to 12GHz). But it turns out the MAX3814 datasheet recommends a ground plane, so that's gone back in for 6.1.

I didn't include the back-termination resistors in the original design because when this IC wasn't present at all (with the FPGA driving the HDMI), there weren't any. So I stuck to what was working, and indeed, it seemed to be working fine until now!

There's no recommended layout in the datasheet (and no application note!) - but tonight I read the datasheet for the dev board, and it's got a layout almost exactly the same as what I've set up for the next version. The only differences are that they put the bypass caps on the top, and they used curved tracks instead of 45-degree bevels. I guess gently curved tracks might have a positive effect at 1.6GHz (MAX3814's top speed)? :shrug:

I carefully checked the IO bank voltages etc in Quartus but couldn't find anything suss in the FPGA side.
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Post by exxos »

There's a eval kit for it which has some layouts in it. Round short traces are better for higher frequencies and every mm of track can be critical.
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viewtopic.php?f=17&t=1585 Have you done the Mandatory Fixes ?
Just because a lot of people agree on something, doesn't make it a fact. ~exxos ~
People should find solutions to problems, not find problems with solutions.
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