TF CD32 Riser Revision 2 Design Complete

68030 + SDRAM + IDE

Moderators: terriblefire, Terriblefire Moderator

User avatar
arkadiusz.makarenko
Trusted Guru
Trusted Guru
Posts: 720
Joined: Wed Jun 19, 2019 7:36 am
Location: Edinburgh

Re: TF CD32 Riser Revision 2 Design Complete

Post by arkadiusz.makarenko » Fri Oct 16, 2020 7:28 pm

terriblefire wrote:
Fri Oct 16, 2020 4:25 pm
arkadiusz.makarenko wrote:
Fri Oct 16, 2020 4:06 pm
Still have some bug in verilog, as I still clash with tf330 somwhere.
Run the complete memory detection in diagrom to see issues.
Diagrom sends rtc interrupt during memory detection (A3000/4000) (at diagrom boot).

How can I check if I clash with higher addresses?
Can you see anything obvious here ?

Code: Select all

wire rtc_decode = A[23:16] == 8'b1101_1100;
wire rtc_int = PUNT_IN & rtc_decode ;


assign PUNT_OUT = PUNT_IN ? (rtc_decode ? 1'b0 : 1'bz) : 1'b0;

assign INTSIG2 = rtc_int; 
assign DSACK = rtc_int?(INTSIG7?2'b10:2'b11):2'bzz ;

assign INTSIG3 = A[3];
assign INTSIG5 = A[5];
Do not trust people. They are capable of greatness.
~ Stanislaw Lem

terriblefire
Moderator Team
Moderator Team
Posts: 3478
Joined: Mon Aug 28, 2017 10:56 pm
Location: Glasgow, UK
Contact:

Re: TF CD32 Riser Revision 2 Design Complete

Post by terriblefire » Fri Oct 16, 2020 8:06 pm

clock these guys or you'll get logic hazards.

https://en.wikipedia.org/wiki/Hazard_(logic)
———
I get cranky when asked to repeat myself.

terriblefire
Moderator Team
Moderator Team
Posts: 3478
Joined: Mon Aug 28, 2017 10:56 pm
Location: Glasgow, UK
Contact:

Re: TF CD32 Riser Revision 2 Design Complete

Post by terriblefire » Fri Oct 16, 2020 9:46 pm

Put at least rtc_int in an always block...

otherwise any glitch will trigger an interrupt.

Code: Select all


always @(posedge CLKCPU_A) begin 

	rtc_int <= ...;

end

using assign's and combi logic is asking for trouble.

Also your arm code should check the interrupt is still pending before responding.
———
I get cranky when asked to repeat myself.

User avatar
arkadiusz.makarenko
Trusted Guru
Trusted Guru
Posts: 720
Joined: Wed Jun 19, 2019 7:36 am
Location: Edinburgh

Re: TF CD32 Riser Revision 2 Design Complete

Post by arkadiusz.makarenko » Fri Oct 16, 2020 11:58 pm

:facepalm:

I should read what is written on the screen, and hold bloody left mouse button when it says to do it if it hangs :D

Saying that adding always and additional check on int signal on arm side, now ram test is successful, workbench boots and clock reads RTC (early days).

Second time I was obsessing about really non issues.
Do not trust people. They are capable of greatness.
~ Stanislaw Lem

matt020
Posts: 169
Joined: Sun Sep 29, 2019 9:17 am
Location: West Australia

Re: TF CD32 Riser Revision 2 Design Complete

Post by matt020 » Sat Oct 17, 2020 2:16 am

Just a quick post from someone who is following this thread with amazement. Such good progress! Keep it up!!

wairnair
Posts: 28
Joined: Sun Dec 09, 2018 3:53 pm

Re: TF CD32 Riser Revision 2 Design Complete

Post by wairnair » Sat Oct 17, 2020 9:22 am

matt020 wrote:
Sat Oct 17, 2020 2:16 am
Just a quick post from someone who is following this thread with amazement. Such good progress! Keep it up!!
same here!

User avatar
arkadiusz.makarenko
Trusted Guru
Trusted Guru
Posts: 720
Joined: Wed Jun 19, 2019 7:36 am
Location: Edinburgh

Re: TF CD32 Riser Revision 2 Design Complete

Post by arkadiusz.makarenko » Sat Oct 17, 2020 7:07 pm

Rtc now can be detected by ATK as msm6242 :)
1602958079115401847416370415696.jpg
1602958079115401847416370415696.jpg (182.42 KiB) Viewed 432 times
Just need to complete setting date and that would be easy stuff more or less ready.

Edit:
Default date need to change... I can't face living in 2020 all the time ;)
Do not trust people. They are capable of greatness.
~ Stanislaw Lem

terriblefire
Moderator Team
Moderator Team
Posts: 3478
Joined: Mon Aug 28, 2017 10:56 pm
Location: Glasgow, UK
Contact:

Re: TF CD32 Riser Revision 2 Design Complete

Post by terriblefire » Sat Oct 17, 2020 7:15 pm

Sweet.
———
I get cranky when asked to repeat myself.

User avatar
arkadiusz.makarenko
Trusted Guru
Trusted Guru
Posts: 720
Joined: Wed Jun 19, 2019 7:36 am
Location: Edinburgh

Re: TF CD32 Riser Revision 2 Design Complete

Post by arkadiusz.makarenko » Sat Oct 17, 2020 8:58 pm

Ok
Writes and reads implemented. I may need to add support for sleep mode and restore after wakeup (Need to wait for new board), but at this point I have done what I could. :)

I have created binaries repository
https://github.com/arkadiuszmakarenko/T ... naries.git

CPLD source code: https://github.com/arkadiuszmakarenko/T ... v1XC9572XL
STM32f722 (still can fit in stm32f730) - https://github.com/arkadiuszmakarenko/TFRiserRev1F722

Time for a bottle of wine.
Do not trust people. They are capable of greatness.
~ Stanislaw Lem

terriblefire
Moderator Team
Moderator Team
Posts: 3478
Joined: Mon Aug 28, 2017 10:56 pm
Location: Glasgow, UK
Contact:

Re: TF CD32 Riser Revision 2 Design Complete

Post by terriblefire » Sat Oct 17, 2020 9:15 pm

arkadiusz.makarenko wrote:
Sat Oct 17, 2020 8:58 pm
CPLD source code: https://github.com/arkadiuszmakarenko/T ... v1XC9572XL
STM32f722 (still can fit in stm32f730) - https://github.com/arkadiuszmakarenko/TFRiserRev1F722

Time for a bottle of wine.
boards are 80% done manufacturing.

We have keyboard and mouse support? :)
———
I get cranky when asked to repeat myself.

Post Reply

Return to “TF330”