STE V1.5 32MHz BOOSTER - STATUS

Help & information about the STE V1 series boosters.
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Re: STE V1.5 32MHz BOOSTER - STATUS

Post by exxos »

Quick update... I've baged the 3 new dual tos and booster boards off to be assembled, i've asked for ASAP service... I just can't find the time for soldering stuff these days :(
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Re: STE V1.5 32MHz BOOSTER - STATUS

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Small update, the current booster and dualtos boards have been built and have been picked up by ups today, so I expect them to arrive Monday.. Then it will just be a matter of finding time to do the tests again etc..
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Re: STE V1.5 32MHz BOOSTER - STATUS

Post by exxos »

Goodies today arrived :) Now to find some time...

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Re: STE V1.5 32MHz BOOSTER - STATUS

Post by exxos »

All installed :)

Had a shorted via on the ROM board, but thankfully it was on the bottom layer so could "track edit" it :)

Booster board fits really nice. Had loads of crashing problems, seems the new buffer I chose is pretty crap :( So went back to the old one and all seems fine now. They seem to really struggle to give proper logic low levels :roll:

This one is running 40MHz , surprised the CPU took the speed!

IMG_2787.JPG
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40mhzste.jpg
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Re: STE V1.5 32MHz BOOSTER - STATUS

Post by rubber_jonnie »

Very nice :)

:yay2: :cheers:
Collector of many retro things!
800XL and 65XE both with Ultimate1MB,VBXL/XE & PokeyMax, SIDE3, SDrive Max, 2x 1010 cassette, 2x 1050 one with Happy mod, 3x 2600 Jr, 7800 and Lynx II
Approx 20 STs, including a 520 STM, 520 STFMs, 3x Mega ST, MSTE & 2x 32 Mhz boosted STEs
Plus the rest, totalling around 50 machines including a QL, 3x BBC Model B, Electron, Spectrums, ZX81 etc...
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Re: STE V1.5 32MHz BOOSTER - STATUS

Post by exxos »

Now with PRRT (C) (predictive rom read technology)

40mhzsteprr.jpg
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Re: STE V1.5 32MHz BOOSTER - STATUS

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Now with SPRRT (c) ( Super Predictive Rom Read Technology) :twisted: :twisted: :twisted: :twisted:

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Re: STE V1.5 32MHz BOOSTER - STATUS

Post by exxos »

I did a video, not much to really see though.




Will leave it running throughout today and make sure the CPU can run at 40MHz...

It's possible not all CPU's may run at 40MHz so not all boosters may run at the higher speeds.
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Re: STE V1.5 32MHz BOOSTER - STATUS

Post by exxos »

40MHz as ran perfectly for several hours for about 4 days now. So the least design stable. I hope all the PLCC CPUs will run at this speed. Though ultimately, I will move to the SEC CPU like used on the STFM. Though I cannot move to that CPU without moving to a larger PLD. So it will likely be a project for next year.

Out of curiosity, I use my variable clock generator and ran at 42MHz.. For a short time.. So CPU is pushed close to its limits, but isn't actually running at its limits.. But even so 40MHz is the maximum possible stable speed. It is still faster than 32MHz anyway :)

ste42.jpg
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So I think we are about therefore final release design :)
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Re: STE V1.5 32MHz BOOSTER - STATUS

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I have had a motherboard in for some time trying to figure out why boosters are unstable on it.. It is one of the more later boards with integrated blitter. I did ask around before and no one else had any problems with the boosters with this particular style of motherboard. Though this one has been a royal PITA.

I first thought there was some issue with the blitter as you was running 2% faster than normal, does not sound much, but it almost always crashed on the main blitter test. I tried delaying signals like DTACK a bit more, and it did seem to help. Though I put back the original code, and the machine was running for almost an hour without crashing.. So the fault was very intermittent but could happen anywhere in a few seconds of turning on the machine to almost an hour later, or not at all.

After scoping around, each time the scope was placed on the ROM CE signal, it instantly crashed. So there was something obviously wrong this signal somehow. I tried adding a pull-up resistor as I was thinking the load of the scope was too much for the CE line, this again did seem to work but was not conclusive, but the ROM speed dropped back down to 309% :roll: so clearly this was not direction to go in.

So I added in a series of resistor into the CE line (100R currently) and so far the machine seems stable and I can connect the scope probe now the side of the resistor without crashing. So I took some screenshots of the before and after signals...


NO RESISTOR
r000.png
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100R RESISTOR
r100.png
r100.png (3.74 KiB) Viewed 4422 times

So I think there is definitely some sort of loading or noise issue on the CE signal. I did try adding in a 22pF capacitor, but this did not change anything, so I added in a second one for 44pF and the machine did not even boot, the corrupt screen. So possible the capacitance of the GAL and ROM IC is simply too much for the STE logic to drive correctly. BOf course there looks to be approximately 1V of undershoot on the signal, could actually latch up CMOS inputs.. So I do need to read up on that again..

So I plan to make some small changes to the DUALTOS boards. Where I will run the ROM CE from the STE CE signal via a ( likely) 100R resistor. Then run the booster CE signal via a second 100R resistor. This way any interference between the GAL and ROM is reduced rather than driving them from the same resistor. Plus the overall load on the STE CE reduced considerably. So I will need to do a revised PCB (again :roll: ).


EDIT:

The ROM PDF says..
Maximum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns.
The GAL PDF says..
GAL22V10 devices are designed with an on-board charge pump to negatively bias the substrate. The negative bias is of sufficient magnitude to prevent input undershoots from causing the circuitry to latch. Additionally, outputs are designed with n-channel pullups instead of the traditional p-channel pullups to eliminate any possibility of SCR induced latching.
So the GAL are pretty hardcore by the sounds of it! So it must be the ROM having issues. Which makes sense as I had trouble getting the dualtos board on its own to run stable on this machine.

The machine under test is still running.. I have my scope sampling over each second, and undershoot max is 400mV.. So under the 600mV limit easily. So looking like another mystery solved :)
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