ST FPGA MMU Development

Progress on our FPGA cores.
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exxos
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Re: ST FPGA MMU Development

Post by exxos » Fri Feb 14, 2020 9:12 pm

Icky and I have been puzzling over the MMU for some days now. I suggested trying my old MEGA 4 into because its the only one I knew which used a lot of rasters... And surprisingly this behaves perfectly correctly. So I wonder if the problem is literally down to full screen operation..

Troed's Closure demo fails to detect the wait states, but I have no idea why as I am not a demo coder... I can only possibly think it may be something to do with 50/60hz switching, but I really would assume all this is done by the GLUE anyway... I'm currently stabbing in the dark as to why the MMU would cause Closure to not detect waitstates :roll: Only as far as we can tell this it may well be the last hurdle to get our FPGA MMU working correctly.

Has anyone any ideas on this, or any programs we can test to see if it gives any clues or not ??


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Re: ST FPGA MMU Development

Post by TimNaber » Fri Feb 14, 2020 9:25 pm

Does re-developing the MMU in FPGA allow you the opportunity to raise the limit on total ST memory? Or is it a straight across replacement due to scarcity?
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Re: ST FPGA MMU Development

Post by exxos » Fri Feb 14, 2020 10:17 pm

TimNaber wrote:
Fri Feb 14, 2020 9:25 pm
Does re-developing the MMU in FPGA allow you the opportunity to raise the limit on total ST memory? Or is it a straight across replacement due to scarcity?
All of the above, we want to run RAM at 32MHz.
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

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Re: ST FPGA MMU Development

Post by czietz » Sat Feb 15, 2020 11:19 am

exxos wrote:
Fri Feb 14, 2020 9:12 pm
Has anyone any ideas on this, or any programs we can test to see if it gives any clues or not ??
Troed's wakestate detection program is open-source and it has some fairly detailed comments what it's checking: https://github.com/troed/WSDETECT/blob/ ... WSDETECT.S.

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Re: ST FPGA MMU Development

Post by stephen_usher » Sat Feb 15, 2020 1:23 pm

czietz wrote:
Sat Feb 15, 2020 11:19 am
exxos wrote:
Fri Feb 14, 2020 9:12 pm
Has anyone any ideas on this, or any programs we can test to see if it gives any clues or not ??
Troed's wakestate detection program is open-source and it has some fairly detailed comments what it's checking: https://github.com/troed/WSDETECT/blob/ ... WSDETECT.S.
So, from what I can see the code is using NOP instructions for timing (i.e. a NOP instruction takes x clock cycles to perform, and hence y microseconds on an 8MHz 68000).
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Re: ST FPGA MMU Development

Post by czietz » Sat Feb 15, 2020 1:37 pm

Almost all of the timing delays are not done by NOPs (they're actually commented out, see these "dcb.w N,$4e71" lines) but by DBF (=DBRA) loops. But in the end that does not matter. From a high-level perspective, what the code does is switching between color and mono or between 50 and 60 Hz at precise moments. This is why exact timing and, therefore, counting instruction cycles is important. Then the test program calculates the video line length, i.e. how many bytes the MMU transferred to the Shifter. From that, it can infer the wakestate.

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Re: ST FPGA MMU Development

Post by exxos » Sat Feb 15, 2020 1:44 pm

@Icky did you try it in mono ? And even 60hz ? I think the diagnostic cart can do 50/60hz switch?
4MB STFM 1.44 FD- VELOCE+ 020 STE - 4MB STE 32MHz - STFM 16MHz - STM - MEGA ST - Falcon 030 CT60 - Atari 2600 - Atari 7800 - Gigafile - SD Floppy Emulator - PeST - HxC - CosmosEx - Ultrasatan - various clutter

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Re: ST FPGA MMU Development

Post by Icky » Sat Feb 15, 2020 5:38 pm

exxos wrote:
Sat Feb 15, 2020 1:44 pm
@Icky did you try it in mono ? And even 60hz ? I think the diagnostic cart can do 50/60hz switch?
I haven't. Will give that a try.

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